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AgeCommit message (Expand)Author
2014-11-03target-mips: remove duplicated mips/ieee mapping functionYongbok Kim
2014-11-03target-mips: add MSA exceptionsYongbok Kim
2014-11-03target-mips: add MSA defines and data structureYongbok Kim
2014-11-03target-mips: enable features in MIPS64R6-generic CPULeon Alrae
2014-11-03target-mips: correctly handle access to unimplemented CP0 registerLeon Alrae
2014-11-03target-mips: add restrictions for possible values in registersLeon Alrae
2014-11-03target-mips: CP0_Status.CU0 no longer allows the user to access CP0Leon Alrae
2014-11-03target-mips: implement forbidden slotLeon Alrae
2014-11-03target-mips: add Config5.SBRILeon Alrae
2014-11-03target-mips: update cpu_save/cpu_load to support new registersLeon Alrae
2014-11-03target-mips: add BadInstr and BadInstrP supportLeon Alrae
2014-11-03target-mips: add TLBINV supportLeon Alrae
2014-11-03target-mips: add new Read-Inhibit and Execute-Inhibit exceptionsLeon Alrae
2014-11-03target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1}Leon Alrae
2014-11-03target-mips: add RI and XI fields to TLB entryLeon Alrae
2014-11-03target-mips: distinguish between data load and instruction fetchLeon Alrae
2014-11-03target-mips: add KScratch registersLeon Alrae
2014-10-24target-mips: add ULL suffix in bitswap to avoid compiler warningLeon Alrae
2014-10-14target-mips: Remove unused gen_load_ACX, gen_store_ACX and cpu_ACXPeter Maydell
2014-10-14target-mips/dsp_helper.c: Add ifdef guards around various functionsPeter Maydell
2014-10-14target-mips/translate.c: Add ifdef guard around check_mips64()Peter Maydell
2014-10-14target-mips/op_helper.c: Remove unused do_lbu() functionPeter Maydell
2014-10-14target-mips/dsp_helper.c: Remove unused function get_DSPControl_24()Peter Maydell
2014-10-14target-mips: fix broken MIPS16 and microMIPSYongbok Kim
2014-10-14target-mips/translate.c: Update OPC_SYNCIDongxue Zhang
2014-10-14target-mips: define a new generic CPU supporting MIPS64 Release 6 ISALeon Alrae
2014-10-14target-mips: remove JR, BLTZAL, BGEZAL and add NAL, BAL instructionsYongbok Kim
2014-10-14target-mips: do not allow Status.FR=0 mode in 64-bit FPULeon Alrae
2014-10-14target-mips: add new Floating Point Comparison instructionsYongbok Kim
2014-10-14target-mips: add new Floating Point instructionsLeon Alrae
2014-10-14target-mips: add AUI, LSA and PCREL instruction familiesLeon Alrae
2014-10-13target-mips: add compact and CP1 branchesYongbok Kim
2014-10-13target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructionsYongbok Kim
2014-10-13target-mips: Status.UX/SX/KX enable 32-bit address wrappingLeon Alrae
2014-10-13target-mips: move CLO, DCLO, CLZ, DCLZ, SDBBP and free special2 in R6Leon Alrae
2014-10-13target-mips: redefine Integer Multiply and Divide instructionsLeon Alrae
2014-10-13target-mips: move PREF, CACHE, LLD and SCD instructionsLeon Alrae
2014-10-13target-mips: signal RI Exception on DSP and Loongson instructionsLeon Alrae
2014-10-13target-mips: split decode_opc_special* into *_r6 and *_legacyLeon Alrae
2014-10-13target-mips: extract decode_opc_special* from decode_opcLeon Alrae
2014-10-13target-mips: move LL and SC instructionsLeon Alrae
2014-10-13target-mips: add SELEQZ and SELNEZ instructionsLeon Alrae
2014-10-13target-mips: signal RI Exception on instructions removed in R6Leon Alrae
2014-10-13target-mips: define ISA_MIPS64R6Leon Alrae
2014-10-06gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flagPeter Maydell
2014-09-25target-mips: Use cpu_exec_interrupt qom hookRichard Henderson
2014-08-12trace: [tcg] Include TCG-tracing header on all targetsLluĂ­s Vilanova
2014-08-07target-mips: Ignore unassigned accesses with KVMJames Hogan
2014-07-28target-mips/translate.c: Free TCG in OPC_DINSVDongxue Zhang
2014-07-09mips/kvm: Disable FPU on reset with KVMJames Hogan