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path: root/target-mips/translate_init.c
AgeCommit message (Expand)Author
2007-10-29Preliminary MIPS64R2 mode.ths
2007-10-23Use the standard ASE check for MIPS-3D and MT.ths
2007-09-30Code provision for n32/n64 mips userland emulation. Not functional yet.ths
2007-09-29Supervisor mode implementation, by Aurelien Jarno.ths
2007-09-24Per-CPU instruction decoding implementation, by Aurelien Jarno.ths
2007-09-23Fix mips usermode emulation.ths
2007-09-06Partial support for 34K multithreading, not functional yet.ths
2007-08-26Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno.ths
2007-07-29Fix MIPS cache configuration, by Aurelien Jarno.ths
2007-06-23Handle MIPS64 SEGBITS value correctly.ths
2007-06-22Allow emulation of 32bit targets in the MIPS64 capable qemu version.ths
2007-06-12Change 20Kc PRID to a later version.ths
2007-06-09R5k has PX implemented.ths
2007-06-01Update some comments, 64bit FPU support is functional regardless ofths
2007-06-01Add support for 5Kc/5Kf/20Kc, based on a patch by Aurelien Jarno.ths
2007-06-01Allow again FPU for usermode emulation.ths
2007-05-30Fix CPU (re-)selection on reset.ths
2007-05-13MIPS TLB style selection at runtime, by Herve Poussineau.ths
2007-05-11Fix missing status ro mask initialization, thanks Stefan Weil.ths
2007-05-07MIPS 64-bit FPU support, plus some collateral bugfixes in theths
2007-04-17Choose number of TLBs at runtime, by Herve Poussineau.ths
2007-04-11Make SYNCI_Step and CCRes CPU-specific.ths
2007-04-01Actually enable 64bit configuration.ths
2007-03-24One more bit of mips CPU configuration, and support for early 4KEcths
2007-03-21Move mips CPU specific initialization to translate_init.c.ths
2007-03-18MIPS -cpu selection support, by Herve Poussineau.ths