Age | Commit message (Expand) | Author |
2007-10-29 | Preliminary MIPS64R2 mode. | ths |
2007-10-23 | Use the standard ASE check for MIPS-3D and MT. | ths |
2007-09-30 | Code provision for n32/n64 mips userland emulation. Not functional yet. | ths |
2007-09-29 | Supervisor mode implementation, by Aurelien Jarno. | ths |
2007-09-24 | Per-CPU instruction decoding implementation, by Aurelien Jarno. | ths |
2007-09-23 | Fix mips usermode emulation. | ths |
2007-09-06 | Partial support for 34K multithreading, not functional yet. | ths |
2007-08-26 | Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno. | ths |
2007-07-29 | Fix MIPS cache configuration, by Aurelien Jarno. | ths |
2007-06-23 | Handle MIPS64 SEGBITS value correctly. | ths |
2007-06-22 | Allow emulation of 32bit targets in the MIPS64 capable qemu version. | ths |
2007-06-12 | Change 20Kc PRID to a later version. | ths |
2007-06-09 | R5k has PX implemented. | ths |
2007-06-01 | Update some comments, 64bit FPU support is functional regardless of | ths |
2007-06-01 | Add support for 5Kc/5Kf/20Kc, based on a patch by Aurelien Jarno. | ths |
2007-06-01 | Allow again FPU for usermode emulation. | ths |
2007-05-30 | Fix CPU (re-)selection on reset. | ths |
2007-05-13 | MIPS TLB style selection at runtime, by Herve Poussineau. | ths |
2007-05-11 | Fix missing status ro mask initialization, thanks Stefan Weil. | ths |
2007-05-07 | MIPS 64-bit FPU support, plus some collateral bugfixes in the | ths |
2007-04-17 | Choose number of TLBs at runtime, by Herve Poussineau. | ths |
2007-04-11 | Make SYNCI_Step and CCRes CPU-specific. | ths |
2007-04-01 | Actually enable 64bit configuration. | ths |
2007-03-24 | One more bit of mips CPU configuration, and support for early 4KEc | ths |
2007-03-21 | Move mips CPU specific initialization to translate_init.c. | ths |
2007-03-18 | MIPS -cpu selection support, by Herve Poussineau. | ths |