Age | Commit message (Expand) | Author |
2014-11-07 | target-mips: fix multiple TCG registers covering same data | Yongbok Kim |
2014-11-07 | mips: Ensure PC update with MTC0 single-stepping | Maciej W. Rozycki |
2014-11-07 | target-mips: fix for missing delay slot in BC1EQZ and BC1NEZ | Leon Alrae |
2014-11-07 | mips: Respect CP0.Status.CU1 for microMIPS FP branches | Maciej W. Rozycki |
2014-11-03 | target-mips: add MSA MI10 format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA 2RF format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA VEC/2R format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA 3RF format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA ELM format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA 3R format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA BIT format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA I5 format instruction | Yongbok Kim |
2014-11-03 | target-mips: add MSA I8 format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA branch instructions | Yongbok Kim |
2014-11-03 | target-mips: add msa_reset(), global msa register | Yongbok Kim |
2014-11-03 | target-mips: add MSA opcode enum | Yongbok Kim |
2014-11-03 | target-mips: stop translation after ctc1 | Yongbok Kim |
2014-11-03 | target-mips: correctly handle access to unimplemented CP0 register | Leon Alrae |
2014-11-03 | target-mips: implement forbidden slot | Leon Alrae |
2014-11-03 | target-mips: add Config5.SBRI | Leon Alrae |
2014-11-03 | target-mips: add BadInstr and BadInstrP support | Leon Alrae |
2014-11-03 | target-mips: add TLBINV support | Leon Alrae |
2014-11-03 | target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1} | Leon Alrae |
2014-11-03 | target-mips: add KScratch registers | Leon Alrae |
2014-10-14 | target-mips: Remove unused gen_load_ACX, gen_store_ACX and cpu_ACX | Peter Maydell |
2014-10-14 | target-mips/translate.c: Add ifdef guard around check_mips64() | Peter Maydell |
2014-10-14 | target-mips: fix broken MIPS16 and microMIPS | Yongbok Kim |
2014-10-14 | target-mips/translate.c: Update OPC_SYNCI | Dongxue Zhang |
2014-10-14 | target-mips: remove JR, BLTZAL, BGEZAL and add NAL, BAL instructions | Yongbok Kim |
2014-10-14 | target-mips: do not allow Status.FR=0 mode in 64-bit FPU | Leon Alrae |
2014-10-14 | target-mips: add new Floating Point Comparison instructions | Yongbok Kim |
2014-10-14 | target-mips: add new Floating Point instructions | Leon Alrae |
2014-10-14 | target-mips: add AUI, LSA and PCREL instruction families | Leon Alrae |
2014-10-13 | target-mips: add compact and CP1 branches | Yongbok Kim |
2014-10-13 | target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructions | Yongbok Kim |
2014-10-13 | target-mips: Status.UX/SX/KX enable 32-bit address wrapping | Leon Alrae |
2014-10-13 | target-mips: move CLO, DCLO, CLZ, DCLZ, SDBBP and free special2 in R6 | Leon Alrae |
2014-10-13 | target-mips: redefine Integer Multiply and Divide instructions | Leon Alrae |
2014-10-13 | target-mips: move PREF, CACHE, LLD and SCD instructions | Leon Alrae |
2014-10-13 | target-mips: signal RI Exception on DSP and Loongson instructions | Leon Alrae |
2014-10-13 | target-mips: split decode_opc_special* into *_r6 and *_legacy | Leon Alrae |
2014-10-13 | target-mips: extract decode_opc_special* from decode_opc | Leon Alrae |
2014-10-13 | target-mips: move LL and SC instructions | Leon Alrae |
2014-10-13 | target-mips: add SELEQZ and SELNEZ instructions | Leon Alrae |
2014-10-13 | target-mips: signal RI Exception on instructions removed in R6 | Leon Alrae |
2014-08-12 | trace: [tcg] Include TCG-tracing header on all targets | LluĂs Vilanova |
2014-07-28 | target-mips/translate.c: Free TCG in OPC_DINSV | Dongxue Zhang |
2014-07-05 | mips/kvm: Init EBase to correct KSEG0 | James Hogan |
2014-06-20 | target-mips: copy CP0_Config1 into DisasContext | Aurelien Jarno |
2014-06-20 | Merge remote-tracking branch 'remotes/kvm/uq/master' into staging | Peter Maydell |