aboutsummaryrefslogtreecommitdiff
path: root/target-mips/translate.c
AgeCommit message (Expand)Author
2012-05-19mips: Fix BC1ANY[24]F instructionsRichard Sandiford
2012-04-30target-mips: Start QOM'ifying CPU initAndreas Färber
2012-04-30target-mips: QOM'ify CPUAndreas Färber
2012-03-14target-mips: Don't overuse CPUStateAndreas Färber
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber
2012-02-28target-mips: Clean includesStefan Weil
2011-09-06mips: Initialize MT state at resetEdgar E. Iglesias
2011-09-06mips: Hook in more reg accesses via mttr/mftrEdgar E. Iglesias
2011-08-20Use glib memory allocation and free functionsAnthony Liguori
2011-06-26Remove exec-all.h include directivesBlue Swirl
2011-04-20Remove unused function parameters from gen_pc_load and rename the functionStefan Weil
2011-04-10Fix conversions from pointer to tcg_target_longStefan Weil
2011-01-24target-mips: fix save_cpu_state() callsAurelien Jarno
2011-01-18mips: Break TBs after mfc0_countEdgar E. Iglesias
2010-12-22target-mips: fix translation of MT instructionsNathan Froyd
2010-10-30target-xxx: Use fprintf_function (format checking)Stefan Weil
2010-10-13mips: avoid write only variablesBlue Swirl
2010-07-31Correctly identify multiple cpus in SMP systemsHervé Poussineau
2010-07-25mips: more fixes to the MIPS interrupt glue logicAurelien Jarno
2010-07-11target-mips: add loongson 2E & 2F integer instructionsAurelien Jarno
2010-07-01target-mips: add Loongson support prefetchAurelien Jarno
2010-07-01target-mips: split load and storeAurelien Jarno
2010-06-30target-mips: fix DINSU instructionAurelien Jarno
2010-06-29target-mips: enable movn/movz on loongson 2E & 2FAurelien Jarno
2010-06-09target-mips: Fix compilationStefan Weil
2010-06-09target-mips: microMIPS ASE supportNathan Froyd
2010-06-09target-mips: mips16 cleanupsNathan Froyd
2010-06-09target-mips: refactor c{, abs}.cond.fmt insnsNathan Froyd
2010-06-09target-mips: move FP FMT comments closer to the definitionsAurelien Jarno
2010-06-09target-mips: define constants for magic numbersNathan Froyd
2010-06-08target-mips: break out [ls][wd]c1 and rdhwr insn generationNathan Froyd
2010-05-05target-mips: Remove duplicate CPU log.Richard Henderson
2010-04-09target-mips: Fix format specifiers for fpu_fprintfStefan Weil
2010-04-08target-mips: Fix one more format specifier for cpu_fprintfStefan Weil
2010-04-08remove TARGET_* defines from translate-all.cPaolo Bonzini
2010-03-04target-mips: use newer logical opsAurelien Jarno
2010-03-02target-mips: use setcond when possibleAurelien Jarno
2010-02-23target-mips: fix ROTR and DROTR by zeroNathan Froyd
2010-02-23target-mips: fix CpU exception for coprocessor 0Nathan Froyd
2010-02-23target-mips: remove useless sign extensionAurelien Jarno
2009-12-13target-mips: fix user-mode emulation startupNathan Froyd
2009-12-13target-mips: add copyright notice for mips16 workNathan Froyd
2009-12-13target-mips: add mips16 instruction decodingNathan Froyd
2009-12-13target-mips: add enums for MIPS16 opcodesNathan Froyd
2009-12-13target-mips: split out delay slot handlingNathan Froyd
2009-12-13target-mips: add gen_base_offset_addrNathan Froyd
2009-12-13target-mips: make gen_compute_branch 16/32-bit-awareNathan Froyd
2009-12-13target-mips: move ROTR and ROTRV inside gen_shift_{imm, }Nathan Froyd
2009-11-30target-mips: use physical address in lladdrAurelien Jarno
2009-11-22target-mips: make CP0_LLAddr register CPU dependentAurelien Jarno
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-28 21:05:46 +0000