aboutsummaryrefslogtreecommitdiff
path: root/target-mips/translate.c
AgeCommit message (Expand)Author
2012-12-08TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin
2012-12-08TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin
2012-12-08TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin
2012-11-24target-mips: remove POOL48A from the microMIPS decodingAurelien Jarno
2012-11-24target-mips: Clean up microMIPS32 major opcode陳韋任 (Wei-Ren Chen)
2012-11-24target-mips: Add comments on POOL32Axf encoding陳韋任 (Wei-Ren Chen)
2012-11-17TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin
2012-11-17TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin
2012-11-15target-mips: fix wrong microMIPS opcode encoding陳韋任 (Wei-Ren Chen)
2012-11-11target-mips: Fix seg fault for LUI when MIPS_DEBUG_DISAS==1.Eric Johnson
2012-11-10disas: avoid using cpu_single_envBlue Swirl
2012-10-31target-mips: use deposit instead of hardcoded versionAurelien Jarno
2012-10-31target-mips: optimize ddiv/ddivu/div/divu with movcondAurelien Jarno
2012-10-31target-mips: implement movn/movz using movcondAurelien Jarno
2012-10-31target-mips: don't use local temps for store conditionalAurelien Jarno
2012-10-31target-mips: implement unaligned loads using TCGAurelien Jarno
2012-10-31target-mips: optimize load operationsAurelien Jarno
2012-10-31target-mips: cleanup load/store operationsAurelien Jarno
2012-10-31target-mips: use the softfloat floatXX_muladd functionsAurelien Jarno
2012-10-31target-mips: do not save CPU state when using retranslationAurelien Jarno
2012-10-31target-mips: correctly restore btarget upon exceptionAurelien Jarno
2012-10-31target-mips: remove #if defined(TARGET_MIPS64) in opcode enumsAurelien Jarno
2012-10-31target-mips: Add ASE DSP accumulator instructionsJia Liu
2012-10-31target-mips: Add ASE DSP compare-pick instructionsJia Liu
2012-10-31target-mips: Add ASE DSP bit/manipulation instructionsJia Liu
2012-10-31target-mips: Add ASE DSP multiply instructionsJia Liu
2012-10-31target-mips: Add ASE DSP GPR-based shift instructionsJia Liu
2012-10-31target-mips: Add ASE DSP arithmetic instructionsJia Liu
2012-10-31target-mips: Add ASE DSP load instructionsJia Liu
2012-10-31target-mips: Add ASE DSP branch instructionsJia Liu
2012-10-31Use correct acc value to index cpu_HI/cpu_LO rather than using a fix numberJia Liu
2012-10-31target-mips: Add ASE DSP resources access checkJia Liu
2012-10-28target-mips: Use TCG registers for the FPU.Richard Henderson
2012-09-27Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson
2012-09-19target-mips: Implement Loongson Multimedia InstructionsRichard Henderson
2012-09-19target-mips: Always evaluate debugging macro argumentsRichard Henderson
2012-09-19target-mips: Fix MIPS_DEBUG.Richard Henderson
2012-09-19target-mips: Set opn in gen_ldst_multiple.Richard Henderson
2012-09-15target-mips: switch to AREG0 free modeBlue Swirl
2012-09-08MIPS/user: Fix reset CPU state initializationMaciej W. Rozycki
2012-08-27target-mips: allow microMIPS SWP and SDP to have RD equal to BASEEric Johnson
2012-08-27target-mips: add privilege level check to several Cop0 instructionsEric Johnson
2012-08-27mips-linux-user: Always support rdhwr.Richard Henderson
2012-08-27target-mips: Streamline indexed cp1 memory addressing.Richard Henderson
2012-08-27Fix order of CVT.PS.S operandsRichard Sandiford
2012-08-27Fix operands of RECIP2.S and RECIP2.PSRichard Sandiford
2012-08-23target-mips: Enable access to required RDHWR hardware registersMeador Inge
2012-08-09MIPS: Correct FCR0 initializationNathan Froyd
2012-06-04target-mips: Let cpu_mips_init() return MIPSCPUAndreas Färber
2012-06-04target-mips: Use cpu_reset() in cpu_mips_init()Andreas Färber
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-28 06:13:03 +0000