slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2012-10-31	target-mips: Add ASE DSP compare-pick instructions	Jia Liu
2012-10-31	target-mips: Add ASE DSP bit/manipulation instructions	Jia Liu
2012-10-31	target-mips: Add ASE DSP multiply instructions	Jia Liu
2012-10-31	target-mips: Add ASE DSP GPR-based shift instructions	Jia Liu
2012-10-31	target-mips: Add ASE DSP arithmetic instructions	Jia Liu
2012-10-31	target-mips: Add ASE DSP load instructions	Jia Liu
2012-10-31	target-mips: Add ASE DSP branch instructions	Jia Liu
2012-10-31	Use correct acc value to index cpu_HI/cpu_LO rather than using a fix number	Jia Liu
2012-10-31	target-mips: Add ASE DSP resources access check	Jia Liu
2012-10-28	target-mips: Use TCG registers for the FPU.	Richard Henderson
2012-09-27	Emit debug_insn for CPU_LOG_TB_OP_OPT as well.	Richard Henderson
2012-09-19	target-mips: Implement Loongson Multimedia Instructions	Richard Henderson
2012-09-19	target-mips: Always evaluate debugging macro arguments	Richard Henderson
2012-09-19	target-mips: Fix MIPS_DEBUG.	Richard Henderson
2012-09-19	target-mips: Set opn in gen_ldst_multiple.	Richard Henderson
2012-09-15	target-mips: switch to AREG0 free mode	Blue Swirl
2012-09-08	MIPS/user: Fix reset CPU state initialization	Maciej W. Rozycki
2012-08-27	target-mips: allow microMIPS SWP and SDP to have RD equal to BASE	Eric Johnson
2012-08-27	target-mips: add privilege level check to several Cop0 instructions	Eric Johnson
2012-08-27	mips-linux-user: Always support rdhwr.	Richard Henderson
2012-08-27	target-mips: Streamline indexed cp1 memory addressing.	Richard Henderson
2012-08-27	Fix order of CVT.PS.S operands	Richard Sandiford
2012-08-27	Fix operands of RECIP2.S and RECIP2.PS	Richard Sandiford
2012-08-23	target-mips: Enable access to required RDHWR hardware registers	Meador Inge
2012-08-09	MIPS: Correct FCR0 initialization	Nathan Froyd
2012-06-04	target-mips: Let cpu_mips_init() return MIPSCPU	Andreas Färber
2012-06-04	target-mips: Use cpu_reset() in cpu_mips_init()	Andreas Färber
2012-05-19	mips: Fix BC1ANY[24]F instructions	Richard Sandiford
2012-04-30	target-mips: Start QOM'ifying CPU init	Andreas Färber
2012-04-30	target-mips: QOM'ify CPU	Andreas Färber
2012-03-14	target-mips: Don't overuse CPUState	Andreas Färber
2012-03-14	Rename cpu_reset() to cpu_state_reset()	Andreas Färber
2012-02-28	target-mips: Clean includes	Stefan Weil
2011-09-06	mips: Initialize MT state at reset	Edgar E. Iglesias
2011-09-06	mips: Hook in more reg accesses via mttr/mftr	Edgar E. Iglesias
2011-08-20	Use glib memory allocation and free functions	Anthony Liguori
2011-06-26	Remove exec-all.h include directives	Blue Swirl
2011-04-20	Remove unused function parameters from gen_pc_load and rename the function	Stefan Weil
2011-04-10	Fix conversions from pointer to tcg_target_long	Stefan Weil
2011-01-24	target-mips: fix save_cpu_state() calls	Aurelien Jarno
2011-01-18	mips: Break TBs after mfc0_count	Edgar E. Iglesias
2010-12-22	target-mips: fix translation of MT instructions	Nathan Froyd
2010-10-30	target-xxx: Use fprintf_function (format checking)	Stefan Weil
2010-10-13	mips: avoid write only variables	Blue Swirl
2010-07-31	Correctly identify multiple cpus in SMP systems	Hervé Poussineau
2010-07-25	mips: more fixes to the MIPS interrupt glue logic	Aurelien Jarno
2010-07-11	target-mips: add loongson 2E & 2F integer instructions	Aurelien Jarno
2010-07-01	target-mips: add Loongson support prefetch	Aurelien Jarno
2010-07-01	target-mips: split load and store	Aurelien Jarno
2010-06-30	target-mips: fix DINSU instruction	Aurelien Jarno