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path: root/target-mips/translate.c
AgeCommit message (Expand)Author
2014-12-16target-mips: Fix formatting in `decode_opc'Maciej W. Rozycki
2014-12-16target-mips: Fix formatting in `decode_extended_mips16_opc'Maciej W. Rozycki
2014-11-07target-mips: fix multiple TCG registers covering same dataYongbok Kim
2014-11-07mips: Ensure PC update with MTC0 single-steppingMaciej W. Rozycki
2014-11-07target-mips: fix for missing delay slot in BC1EQZ and BC1NEZLeon Alrae
2014-11-07mips: Respect CP0.Status.CU1 for microMIPS FP branchesMaciej W. Rozycki
2014-11-03target-mips: add MSA MI10 format instructionsYongbok Kim
2014-11-03target-mips: add MSA 2RF format instructionsYongbok Kim
2014-11-03target-mips: add MSA VEC/2R format instructionsYongbok Kim
2014-11-03target-mips: add MSA 3RF format instructionsYongbok Kim
2014-11-03target-mips: add MSA ELM format instructionsYongbok Kim
2014-11-03target-mips: add MSA 3R format instructionsYongbok Kim
2014-11-03target-mips: add MSA BIT format instructionsYongbok Kim
2014-11-03target-mips: add MSA I5 format instructionYongbok Kim
2014-11-03target-mips: add MSA I8 format instructionsYongbok Kim
2014-11-03target-mips: add MSA branch instructionsYongbok Kim
2014-11-03target-mips: add msa_reset(), global msa registerYongbok Kim
2014-11-03target-mips: add MSA opcode enumYongbok Kim
2014-11-03target-mips: stop translation after ctc1Yongbok Kim
2014-11-03target-mips: correctly handle access to unimplemented CP0 registerLeon Alrae
2014-11-03target-mips: implement forbidden slotLeon Alrae
2014-11-03target-mips: add Config5.SBRILeon Alrae
2014-11-03target-mips: add BadInstr and BadInstrP supportLeon Alrae
2014-11-03target-mips: add TLBINV supportLeon Alrae
2014-11-03target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1}Leon Alrae
2014-11-03target-mips: add KScratch registersLeon Alrae
2014-10-14target-mips: Remove unused gen_load_ACX, gen_store_ACX and cpu_ACXPeter Maydell
2014-10-14target-mips/translate.c: Add ifdef guard around check_mips64()Peter Maydell
2014-10-14target-mips: fix broken MIPS16 and microMIPSYongbok Kim
2014-10-14target-mips/translate.c: Update OPC_SYNCIDongxue Zhang
2014-10-14target-mips: remove JR, BLTZAL, BGEZAL and add NAL, BAL instructionsYongbok Kim
2014-10-14target-mips: do not allow Status.FR=0 mode in 64-bit FPULeon Alrae
2014-10-14target-mips: add new Floating Point Comparison instructionsYongbok Kim
2014-10-14target-mips: add new Floating Point instructionsLeon Alrae
2014-10-14target-mips: add AUI, LSA and PCREL instruction familiesLeon Alrae
2014-10-13target-mips: add compact and CP1 branchesYongbok Kim
2014-10-13target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructionsYongbok Kim
2014-10-13target-mips: Status.UX/SX/KX enable 32-bit address wrappingLeon Alrae
2014-10-13target-mips: move CLO, DCLO, CLZ, DCLZ, SDBBP and free special2 in R6Leon Alrae
2014-10-13target-mips: redefine Integer Multiply and Divide instructionsLeon Alrae
2014-10-13target-mips: move PREF, CACHE, LLD and SCD instructionsLeon Alrae
2014-10-13target-mips: signal RI Exception on DSP and Loongson instructionsLeon Alrae
2014-10-13target-mips: split decode_opc_special* into *_r6 and *_legacyLeon Alrae
2014-10-13target-mips: extract decode_opc_special* from decode_opcLeon Alrae
2014-10-13target-mips: move LL and SC instructionsLeon Alrae
2014-10-13target-mips: add SELEQZ and SELNEZ instructionsLeon Alrae
2014-10-13target-mips: signal RI Exception on instructions removed in R6Leon Alrae
2014-08-12trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova
2014-07-28target-mips/translate.c: Free TCG in OPC_DINSVDongxue Zhang
2014-07-05mips/kvm: Init EBase to correct KSEG0James Hogan
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