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2007-05-13Fix mfc0 and dmtc0 instructions on MIPS64, by Aurelien Jarno.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2819 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13Don't decode CP0 XContext on 32bit MIPS.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2812 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13MIPS TLB style selection at runtime, by Herve Poussineau.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11Implemented cabs FP instructions, and improve exception handling forths
trunc/floor/ceil/round. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2804 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11Another bit of nicer debug output.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2803 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11Implement FP madd/msub, wire up bc1any[24][ft].ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2802 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11Improved debug output for the MIPS opcode decoder.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2801 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-10Fix for the scd instruction, by Aurelien Jarno.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2799 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-09Fix MIPS64 address computation specialcase, by Aurelien Jarno.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2793 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-07MIPS 64-bit FPU support, plus some collateral bugfixes in theths
conditional branch handling. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2779 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-25Next attempt to get the lui sign extension right.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2727 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-25Fix lui sign extension.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2726 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-17Choose number of TLBs at runtime, by Herve Poussineau.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-16Simplify branch likely handling.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2676 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-15Don't use T2 for INS, it conflicts with branch delay slot handling.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-15Small code generation optimization.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2672 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-14Restart interrupts after an exception.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2664 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-11Make SYNCI_Step and CCRes CPU-specific.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2651 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-11Throw RI for invalid MFMC0-class instructions. Introduce optionalths
MIPS_STRICT_STANDARD define to adhere more to the spec than it makes sense in normal operation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2650 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-11Code formatting fix.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2649 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-11More Context/Xcontext fixes. Ifdef some 64bit-only ops, they mayths
end up empty for 32bit mips, which dyngen trips over. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2648 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09Fix CP0_IntCtl handling.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2645 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09Mark watchpoint features as unimplemented.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2643 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09Catch unaligned sc/scd.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2642 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09Fix exception handling cornercase for rdhwr.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2641 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09Remove bogus mtc0 handling.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2640 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07Implement prefx.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2630 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07Set proper BadVAddress value for unaligned instruction fetch.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2629 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07Actually skip over delay slot for a non-taken branch likely.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2628 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-06Save state for all CP0 instructions, they may throw a CPU exception.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2622 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05fix branch delay slot cornercases.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2615 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05Fix rotr immediate ops, mask shift/rotate arguments to their allowedths
size. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2614 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05Fix RDHWR handling. Code formatting. Don't use *_direct versions to raiseths
exceptions. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2611 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-04Fix code formatting.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2595 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-02MIPS32R2 needs RDPGPR/WRPGPR instructions even when no shadow registersths
are implemented. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2589 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01Actually enable 64bit configuration.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2565 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-30Sanitize mips exception handling.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2546 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-23Fix enough FPU/R2 support to get 24Kf going.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2528 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-21Move mips CPU specific initialization to translate_init.c.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2522 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-19Barf on branches/jumps in branch delay slots. Spotted by Stefan Weil.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2513 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-19Define gen_intermediate_code_internal as "static inline".ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2512 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-18MIPS -cpu selection support, by Herve Poussineau.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-02MIPS Userland TLS register emulation, by Daniel Jacobowitz.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2465 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-28MIPS FPU dynamic activation, part 1, by Herve Poussineau.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2463 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-27Fix mips FPU emulation, 32 bit data types are allowed to use odd registers.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2454 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-20Replace TLSZ with TARGET_FMT_lx.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2444 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-24EBase is limited to KSEG0/KSEG1 even on 64bit CPUs.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2351 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-23Implementing dmfc/dmtc.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2348 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-21Scrap SIGN_EXTEND32.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2251 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-21Preliminiary MIPS64 support, disabled by default due to performance impact.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2250 c046a42c-6fe2-441c-8c8c-71466251a162
generated by cgit v1.2.3 (git 2.26.2) at 2025-01-02 12:31:15 +0000