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path: root/target-mips/translate.c
AgeCommit message (Expand)Author
2008-05-24Fix mov[tf].ps handling for MIPS, by Richard Sandiford.ths
2008-05-24Un-break MIPS conditional moves, by Richard Sandiford.ths
2008-05-24Fix ARM conditional branch bug.pbrook
2008-05-23Swithc some MIPS CP0 accesses to TCG.ths
2008-05-23Switch MIPS movf/movt to TCG.ths
2008-05-22Switch MIPS branch handling to TCG, and clean out pointless wrapperths
2008-05-21Switch MIPS clo/clz and the condition tests to TCG.ths
2008-05-21Switch MIPS movn/movz to TCG.ths
2008-05-18Switch most MIPS logical and arithmetic instructions to TCG.ths
2008-05-18Fix local register cache handling.ths
2008-05-07Be more economical with local temporaries.ths
2008-05-06Convert some MIPS load/store instructions to TCG.ths
2008-05-06Use TCG for MIPS GPR moves.ths
2008-05-06Fix MIPS64 branches. Funny how this survived testing.ths
2008-05-05Really really revert commit r4343aurel32
2008-05-05Really revert commit r4343aurel32
2008-05-05Don't stop translation for mtc0 compareaurel32
2008-05-04Simplify mips branch handling. Retire T2 from use. Use TCG for branches.ths
2008-04-28Factorize code in translate.caurel32
2008-04-11Remove osdep.c/qemu-img code duplicationaurel32
2008-02-12Make MIPS MT implementation more cache friendly.ths
2008-02-01use the TCG code generatorbellard
2007-12-30MIPS COP1X (and related) instructions, by Richard Sandiford.ths
2007-12-25Support for VR5432, and some of its special instructions. Original patchths
2007-12-24Update debug code to match new accumulator register layout.ths
2007-12-09Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.ths
2007-11-26Micro-optimize back-to-back store-load sequences.ths
2007-11-22Optimize the conventional move operation.ths
2007-11-18Fix MIPS64 R2 instructions.ths
2007-11-10added cpu_model parameter to cpu_init()bellard
2007-11-08Clean out the N32 macros from target-mips, and introduce MIPS ABI specificths
2007-11-08Formatting fix.ths
2007-10-28Implement missing MIPS supervisor mode bits.ths
2007-10-24Remove bogus instruction decode.ths
2007-10-23Use the standard ASE check for MIPS-3D and MT.ths
2007-10-23Switch bc1any* instructions off if no MIPS-3D is implemented.ths
2007-10-09Use always_inline in the MIPS support where applicable.ths
2007-10-09Fix [ls][wd][lr] instructions, by Aurelien Jarno.ths
2007-09-30Code provision for n32/n64 mips userland emulation. Not functional yet.ths
2007-09-26Wrap a few often used tests with unlikely(), by Aurelien Jarno.ths
2007-09-25Optimise instructions accessing CP0, by Aurelien Jarno.ths
2007-09-24Per-CPU instruction decoding implementation, by Aurelien Jarno.ths
2007-09-20Extend TB flags to 64 bits (Alexander Graf).j_mayer
2007-09-17find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the...ths
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths
2007-09-11Fix tb->size mishandling, by Daniel Jacobowitz.ths
2007-09-06Partial support for 34K multithreading, not functional yet.ths
2007-08-26Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno.ths
2007-06-26Implement recip1/recip2/rsqrt1/rsqrt2.ths
2007-06-02Check for R2 instructions, and throw RI if we don't emulate R2.ths