aboutsummaryrefslogtreecommitdiff
path: root/target-mips/op_helper.c
AgeCommit message (Expand)Author
2007-06-03Clean up of some target specifics in exec.c/cpu-exec.c.ths
2007-05-31Add proper float*_is_nan prototypes.ths
2007-05-28Fix ddivu for 32bit hosts, by Aurelien Jarno.ths
2007-05-20Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions.ths
2007-05-19More MIPS 64-bit FPU support.ths
2007-05-18- Move FPU exception handling into helper functions, since they are big.ths
2007-05-16More generic 64 bit multiplication support, by Aurelien Jarno.ths
2007-05-13Full MIPS64 MMU implementation, by Aurelien Jarno.ths
2007-05-13MMU code improvements, by Aurelien Jarno.ths
2007-05-13MIPS TLB style selection at runtime, by Herve Poussineau.ths
2007-04-17Choose number of TLBs at runtime, by Herve Poussineau.ths
2007-04-15Fix qemu SIGFPE caused by division-by-zero due to underflow.ths
2007-04-15Delete unused define.ths
2007-04-13Nicer Log formatting.ths
2007-04-06Save state for all CP0 instructions, they may throw a CPU exception.ths
2007-04-05Fix rotr immediate ops, mask shift/rotate arguments to their allowedths
2007-04-02Build fix for 64bit machines. (This is still not correct mul/div handling.)ths
2007-04-01Actually enable 64bit configuration.ths
2007-04-01MIPS64 configurations.ths
2007-03-30Sanitize mips exception handling.ths
2007-03-23Fix enough FPU/R2 support to get 24Kf going.ths
2007-02-28MIPS FPU dynamic activation, part 1, by Herve Poussineau.ths
2007-02-20Replace TLSZ with TARGET_FMT_lx.ths
2007-02-18Fix sign-extension of VPN field in TLB, by Herve Poussineau.ths
2007-01-24Reworking MIPS interrupt handling, by Aurelien Jarno.ths
2007-01-23Implementing dmfc/dmtc.ths
2007-01-22Fix PageMask handling, second part.ths
2007-01-21Bring TLB / PageSize handling in line with real hardware behaviour.ths
2007-01-03moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - suppr...bellard
2007-01-01Simplify code and fix formatting.ths
2006-12-21Scrap SIGN_EXTEND32.ths
2006-12-21Preliminiary MIPS64 support, disabled by default due to performance impact.ths
2006-12-06Add MIPS32R2 instructions, and generally straighten out the instructionths
2006-12-06Dynamically translate MIPS mtc0 instructions.ths
2006-12-06Dynamically translate MIPS mfc0 instructions.ths
2006-12-06MIPS TLB performance improvements, by Daniel Jacobowitz.ths
2006-11-12Avoid redundant TLB flushes (Daniel Jacobowitz).pbrook
2006-06-26consistent update of ERL and EXLbellard
2006-06-14MIPS FPU support (Marius Goeger)bellard
2006-05-22fix wrong bitmasks for CP0_Context and CP0_EntryHi (Thiemo Seufer)bellard
2006-05-22cosmetics (Thiemo Seufer)bellard
2006-04-23removed unnecessary headerbellard
2006-03-11Avoid flushing of global TLB entries for differing ASIDs (Thiemo Seufer).pbrook
2006-03-11e bitfields in mips TLB structures (Thiemo Seufer).pbrook
2005-12-05MIPS fixes (Daniel Jacobowitz)bellard
2005-11-26mips user emulationbellard
2005-07-04correct split between helper.c and op_helper.c - cosmeticsbellard
2005-07-02use MIPS_TLB_NB constant (Ralf Baechle)bellard
2005-07-02use mask in C0_status (Ralf Baechle)bellard
2005-07-02fixed C0 status codes (Ralf Baechle)bellard