| Age | Commit message (Expand) | Author |
|---|
| 2007-05-20 | Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions. | ths |
| 2007-05-19 | More MIPS 64-bit FPU support. | ths |
| 2007-05-18 | - Move FPU exception handling into helper functions, since they are big. | ths |
| 2007-05-16 | More generic 64 bit multiplication support, by Aurelien Jarno. | ths |
| 2007-05-13 | Full MIPS64 MMU implementation, by Aurelien Jarno. | ths |
| 2007-05-13 | MMU code improvements, by Aurelien Jarno. | ths |
| 2007-05-13 | MIPS TLB style selection at runtime, by Herve Poussineau. | ths |
| 2007-04-17 | Choose number of TLBs at runtime, by Herve Poussineau. | ths |
| 2007-04-15 | Fix qemu SIGFPE caused by division-by-zero due to underflow. | ths |
| 2007-04-15 | Delete unused define. | ths |
| 2007-04-13 | Nicer Log formatting. | ths |
| 2007-04-06 | Save state for all CP0 instructions, they may throw a CPU exception. | ths |
| 2007-04-05 | Fix rotr immediate ops, mask shift/rotate arguments to their allowed | ths |
| 2007-04-02 | Build fix for 64bit machines. (This is still not correct mul/div handling.) | ths |
| 2007-04-01 | Actually enable 64bit configuration. | ths |
| 2007-04-01 | MIPS64 configurations. | ths |
| 2007-03-30 | Sanitize mips exception handling. | ths |
| 2007-03-23 | Fix enough FPU/R2 support to get 24Kf going. | ths |
| 2007-02-28 | MIPS FPU dynamic activation, part 1, by Herve Poussineau. | ths |
| 2007-02-20 | Replace TLSZ with TARGET_FMT_lx. | ths |
| 2007-02-18 | Fix sign-extension of VPN field in TLB, by Herve Poussineau. | ths |
| 2007-01-24 | Reworking MIPS interrupt handling, by Aurelien Jarno. | ths |
| 2007-01-23 | Implementing dmfc/dmtc. | ths |
| 2007-01-22 | Fix PageMask handling, second part. | ths |
| 2007-01-21 | Bring TLB / PageSize handling in line with real hardware behaviour. | ths |
| 2007-01-03 | moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - suppr... | bellard |
| 2007-01-01 | Simplify code and fix formatting. | ths |
| 2006-12-21 | Scrap SIGN_EXTEND32. | ths |
| 2006-12-21 | Preliminiary MIPS64 support, disabled by default due to performance impact. | ths |
| 2006-12-06 | Add MIPS32R2 instructions, and generally straighten out the instruction | ths |
| 2006-12-06 | Dynamically translate MIPS mtc0 instructions. | ths |
| 2006-12-06 | Dynamically translate MIPS mfc0 instructions. | ths |
| 2006-12-06 | MIPS TLB performance improvements, by Daniel Jacobowitz. | ths |
| 2006-11-12 | Avoid redundant TLB flushes (Daniel Jacobowitz). | pbrook |
| 2006-06-26 | consistent update of ERL and EXL | bellard |
| 2006-06-14 | MIPS FPU support (Marius Goeger) | bellard |
| 2006-05-22 | fix wrong bitmasks for CP0_Context and CP0_EntryHi (Thiemo Seufer) | bellard |
| 2006-05-22 | cosmetics (Thiemo Seufer) | bellard |
| 2006-04-23 | removed unnecessary header | bellard |
| 2006-03-11 | Avoid flushing of global TLB entries for differing ASIDs (Thiemo Seufer). | pbrook |
| 2006-03-11 | e bitfields in mips TLB structures (Thiemo Seufer). | pbrook |
| 2005-12-05 | MIPS fixes (Daniel Jacobowitz) | bellard |
| 2005-11-26 | mips user emulation | bellard |
| 2005-07-04 | correct split between helper.c and op_helper.c - cosmetics | bellard |
| 2005-07-02 | use MIPS_TLB_NB constant (Ralf Baechle) | bellard |
| 2005-07-02 | use mask in C0_status (Ralf Baechle) | bellard |
| 2005-07-02 | fixed C0 status codes (Ralf Baechle) | bellard |
| 2005-07-02 | soft irq are just irqs (Ralf Baechle) | bellard |
| 2005-07-02 | MIPS target (Jocelyn Mayer) | bellard |
