Age | Commit message (Expand) | Author |
2015-02-13 | target-mips: ll and lld cause AdEL exception for unaligned address | Leon Alrae |
2015-01-20 | target-mips: Don't use _raw load/store accessors | Peter Maydell |
2014-12-16 | target-mips: Add missing calls to synchronise SoftFloat status | Maciej W. Rozycki |
2014-12-16 | target-mips: Also apply the CP0.Status mask to MTTC0 | Maciej W. Rozycki |
2014-12-16 | target-mips: Fix CP0.Config3.ISAOnExc write accesses | Maciej W. Rozycki |
2014-12-16 | target-mips: Correct the writes to Status and Cause registers via gdbstub | Maciej W. Rozycki |
2014-12-16 | target-mips: Correct the handling of writes to CP0.Status for MIPSr6 | Maciej W. Rozycki |
2014-12-16 | target-mips: Restore the order of helpers | Maciej W. Rozycki |
2014-12-16 | target-mips: Remove unused `FLOAT_OP' macro | Maciej W. Rozycki |
2014-12-16 | target-mips: Make `helper_float_cvtw_s' consistent with the remaining helpers | Maciej W. Rozycki |
2014-11-03 | target-mips: add MSA MI10 format instructions | Yongbok Kim |
2014-11-03 | target-mips: remove duplicated mips/ieee mapping function | Yongbok Kim |
2014-11-03 | target-mips: add MSA defines and data structure | Yongbok Kim |
2014-11-03 | target-mips: add restrictions for possible values in registers | Leon Alrae |
2014-11-03 | target-mips: add BadInstr and BadInstrP support | Leon Alrae |
2014-11-03 | target-mips: add TLBINV support | Leon Alrae |
2014-11-03 | target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1} | Leon Alrae |
2014-11-03 | target-mips: add RI and XI fields to TLB entry | Leon Alrae |
2014-10-24 | target-mips: add ULL suffix in bitswap to avoid compiler warning | Leon Alrae |
2014-10-14 | target-mips/op_helper.c: Remove unused do_lbu() function | Peter Maydell |
2014-10-14 | target-mips: add new Floating Point Comparison instructions | Yongbok Kim |
2014-10-14 | target-mips: add new Floating Point instructions | Leon Alrae |
2014-10-13 | target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructions | Yongbok Kim |
2014-08-07 | target-mips: Ignore unassigned accesses with KVM | James Hogan |
2014-06-18 | target-mips: implement UserLocal Register | Petar Jovanovic |
2014-06-05 | softmmu: introduce cpu_ldst.h | Paolo Bonzini |
2014-06-05 | softmmu: commonize helper definitions | Paolo Bonzini |
2014-06-05 | softmmu: move ALIGNED_ONLY to cpu.h | Paolo Bonzini |
2014-06-05 | softmmu: make do_unaligned_access a method of CPU | Paolo Bonzini |
2014-05-28 | tcg: Invert the inclusion of helper.h | Richard Henderson |
2014-03-27 | target-mips: Avoid shifting left into sign bit | Peter Maydell |
2014-03-13 | cputlb: Change tlb_flush() argument to CPUState | Andreas Färber |
2014-03-13 | exec: Change cpu_abort() argument to CPUState | Andreas Färber |
2014-03-13 | translate-all: Change cpu_restore_state() argument to CPUState | Andreas Färber |
2014-03-13 | cpu-exec: Change cpu_loop_exit() argument to CPUState | Andreas Färber |
2014-03-13 | exec: Change tlb_fill() argument to CPUState | Andreas Färber |
2014-03-13 | cpu: Move exception_index field from CPU_COMMON to CPUState | Andreas Färber |
2014-03-13 | cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook | Andreas Färber |
2014-02-10 | target-mips: add user-mode FR switch support for MIPS32r5 | Petar Jovanovic |
2014-02-10 | target-mips: add support for CP0_Config5 | Petar Jovanovic |
2014-02-10 | target-mips: add support for CP0_Config4 | Petar Jovanovic |
2013-09-03 | cpu: Use QTAILQ for CPU list | Andreas Färber |
2013-07-29 | target-mips: Remove assignment to a variable which is never used | Stefan Weil |
2013-07-09 | cpu: Make first_cpu and next_cpu CPUState | Andreas Färber |
2013-06-28 | cpu: Turn cpu_unassigned_access() into a CPUState hook | Andreas Färber |
2013-03-12 | cpu: Pass CPUState to cpu_interrupt() | Andreas Färber |
2013-03-12 | exec: Pass CPUState to cpu_reset_interrupt() | Andreas Färber |
2013-03-12 | cpu: Move halted and interrupt_request fields to CPUState | Andreas Färber |
2013-02-23 | target-mips: Use mul[us]2 in [D]MULT[U] insns | Richard Henderson |
2013-01-31 | target-mips: Unfuse {,N}M{ADD,SUB}.fmt | Richard Sandiford |