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QEMU is a generic and open source machine & userspace emulator and virtualizer
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target-mips
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op_helper.c
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Author
2016-05-19
cpu: move exec-all.h inclusion out of cpu.h
Paolo Bonzini
2016-05-18
Fix some typos found by codespell
Stefan Weil
2016-04-28
target-mips: Fix RDHWR exception host PC
James Hogan
2016-03-30
target-mips: add MAAR, MAARI register
Yongbok Kim
2016-03-30
target-mips: make ITC Configuration Tags accessible to the CPU
Leon Alrae
2016-02-26
target-mips: implement R6 multi-threading
Yongbok Kim
2016-01-23
mips: Clean up includes
Peter Maydell
2016-01-23
target-mips: silence NaNs for cvt.s.d and cvt.d.s
Aurelien Jarno
2015-11-24
target-mips: flush QEMU TLB when disabling 64-bit addressing
Leon Alrae
2015-10-30
target-mips: add PC, XNP reg numbers to RDHWR
Yongbok Kim
2015-09-18
target-mips: improve exception handling
Pavel Dovgaluk
2015-09-18
target-mips: Fix RDHWR on CP0.Count
Alex Smith
2015-09-11
tlb: Add "ifetch" argument to cpu_mmu_index()
Benjamin Herrenschmidt
2015-08-13
target-mips: Use CPU_LOG_INT for logging related to interrupts
Richard Henderson
2015-07-28
target-mips: fix offset calculation for Interrupts
Yongbok Kim
2015-07-15
target-mips: correct DERET instruction
Leon Alrae
2015-07-15
target-mips: fix ASID synchronisation for MIPS MT
Aurelien Jarno
2015-06-12
target-mips: add CP0.PageGrain.ELPA support
Leon Alrae
2015-06-12
target-mips: support Page Frame Number Extension field
Leon Alrae
2015-06-12
target-mips: extend selected CP0 registers to 64-bits in MIPS32
Leon Alrae
2015-06-11
target-mips: add ERETNC instruction and Config5.LLB bit
Leon Alrae
2015-06-11
target-mips: Misaligned memory accesses for MSA
Yongbok Kim
2015-06-11
target-mips: add Config5.FRE support allowing Status.FR=0 emulation
Leon Alrae
2015-02-13
target-mips: ll and lld cause AdEL exception for unaligned address
Leon Alrae
2015-01-20
target-mips: Don't use _raw load/store accessors
Peter Maydell
2014-12-16
target-mips: Add missing calls to synchronise SoftFloat status
Maciej W. Rozycki
2014-12-16
target-mips: Also apply the CP0.Status mask to MTTC0
Maciej W. Rozycki
2014-12-16
target-mips: Fix CP0.Config3.ISAOnExc write accesses
Maciej W. Rozycki
2014-12-16
target-mips: Correct the writes to Status and Cause registers via gdbstub
Maciej W. Rozycki
2014-12-16
target-mips: Correct the handling of writes to CP0.Status for MIPSr6
Maciej W. Rozycki
2014-12-16
target-mips: Restore the order of helpers
Maciej W. Rozycki
2014-12-16
target-mips: Remove unused `FLOAT_OP' macro
Maciej W. Rozycki
2014-12-16
target-mips: Make `helper_float_cvtw_s' consistent with the remaining helpers
Maciej W. Rozycki
2014-11-03
target-mips: add MSA MI10 format instructions
Yongbok Kim
2014-11-03
target-mips: remove duplicated mips/ieee mapping function
Yongbok Kim
2014-11-03
target-mips: add MSA defines and data structure
Yongbok Kim
2014-11-03
target-mips: add restrictions for possible values in registers
Leon Alrae
2014-11-03
target-mips: add BadInstr and BadInstrP support
Leon Alrae
2014-11-03
target-mips: add TLBINV support
Leon Alrae
2014-11-03
target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1}
Leon Alrae
2014-11-03
target-mips: add RI and XI fields to TLB entry
Leon Alrae
2014-10-24
target-mips: add ULL suffix in bitswap to avoid compiler warning
Leon Alrae
2014-10-14
target-mips/op_helper.c: Remove unused do_lbu() function
Peter Maydell
2014-10-14
target-mips: add new Floating Point Comparison instructions
Yongbok Kim
2014-10-14
target-mips: add new Floating Point instructions
Leon Alrae
2014-10-13
target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructions
Yongbok Kim
2014-08-07
target-mips: Ignore unassigned accesses with KVM
James Hogan
2014-06-18
target-mips: implement UserLocal Register
Petar Jovanovic
2014-06-05
softmmu: introduce cpu_ldst.h
Paolo Bonzini
2014-06-05
softmmu: commonize helper definitions
Paolo Bonzini
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