| Age | Commit message (Expand) | Author |
|---|
| 2007-11-09 | Use FORCE_RET, scrap RETURN which was implemented in target-specific code. | ths |
| 2007-11-08 | Clean out the N32 macros from target-mips, and introduce MIPS ABI specific | ths |
| 2007-10-29 | Restrict CP0_PerfCnt to legal values. | ths |
| 2007-10-28 | Implement missing MIPS supervisor mode bits. | ths |
| 2007-10-27 | Add sharable clz/clo inline functions and use them for the mips target. | ths |
| 2007-10-26 | The other half of the mul64 rework. Sorry for the breakage, I committed | ths |
| 2007-10-24 | Force proper sign extension for mfc0/mfhc0 on MIPS64. | ths |
| 2007-10-23 | Fix writable length of the index register. | ths |
| 2007-10-23 | Fix CLO calculation for MIPS64. And a small code cleanup. | ths |
| 2007-10-09 | Use always_inline in the MIPS support where applicable. | ths |
| 2007-09-30 | Code provision for n32/n64 mips userland emulation. Not functional yet. | ths |
| 2007-09-26 | hflags computation cleanup, by Aurelien Jarno. | ths |
| 2007-09-25 | Timer start/stop implementation, by Aurelien Jarno. | ths |
| 2007-09-25 | Optimise instructions accessing CP0, by Aurelien Jarno. | ths |
| 2007-09-24 | Per-CPU instruction decoding implementation, by Aurelien Jarno. | ths |
| 2007-09-16 | find -type f | xargs sed -i 's/[\t ]$//g' # on most files | ths |
| 2007-09-06 | Partial support for 34K multithreading, not functional yet. | ths |
| 2007-08-26 | Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno. | ths |
| 2007-06-25 | MIPS64 improvements, based on a patch by Aurelien Jarno. | ths |
| 2007-06-23 | Handle MIPS64 SEGBITS value correctly. | ths |
| 2007-06-22 | Fix write to K0 bits in Config0, by Aurelien Jarno. | ths |
| 2007-05-29 | Don't check the FPU state for each FPU instruction, use hflags to | ths |
| 2007-05-28 | Handle PX/UX status flags correctly, by Aurelien Jarno. | ths |
| 2007-05-28 | MIPS64 addressing fixes, by Aurelien Jarno. | ths |
| 2007-05-23 | The 24k wants more watch and srsmap registers. | ths |
| 2007-05-23 | The previous patch to make breakpoints work was a performance | ths |
| 2007-05-20 | Fix indexed FP load/store instructions. | ths |
| 2007-05-19 | More MIPS 64-bit FPU support. | ths |
| 2007-05-19 | Fix slti/sltiu for MIPS64, by Aurelien Jarno. | ths |
| 2007-05-18 | - Move FPU exception handling into helper functions, since they are big. | ths |
| 2007-05-18 | Work around the lack of proper handling for self-modifying code. | ths |
| 2007-05-16 | More generic 64 bit multiplication support, by Aurelien Jarno. | ths |
| 2007-05-13 | Full MIPS64 MMU implementation, by Aurelien Jarno. | ths |
| 2007-05-13 | Fix mfc0 and dmtc0 instructions on MIPS64, by Aurelien Jarno. | ths |
| 2007-05-13 | Delete misleading comment. | ths |
| 2007-05-13 | MMU code improvements, by Aurelien Jarno. | ths |
| 2007-05-13 | MIPS TLB style selection at runtime, by Herve Poussineau. | ths |
| 2007-05-11 | Implemented cabs FP instructions, and improve exception handling for | ths |
| 2007-05-11 | Implement FP madd/msub, wire up bc1any[24][ft]. | ths |
| 2007-05-09 | Fix MIPS64 address computation specialcase, by Aurelien Jarno. | ths |
| 2007-05-08 | Work around gcc's mips define, spotted by Stefan Weil. | ths |
| 2007-05-07 | MIPS 64-bit FPU support, plus some collateral bugfixes in the | ths |
| 2007-04-17 | Choose number of TLBs at runtime, by Herve Poussineau. | ths |
| 2007-04-15 | Don't use T2 for INS, it conflicts with branch delay slot handling. | ths |
| 2007-04-15 | Fix qemu SIGFPE caused by division-by-zero due to underflow. | ths |
| 2007-04-14 | Restart interrupts after an exception. | ths |
| 2007-04-13 | Another fix for CP0 Cause register handling. | ths |
| 2007-04-11 | More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may | ths |
| 2007-04-09 | Fix CP0_IntCtl handling. | ths |
| 2007-04-09 | Proper handling of reserved bits in the context register. | ths |
