aboutsummaryrefslogtreecommitdiff
path: root/target-mips/op.c
AgeCommit message (Expand)Author
2008-02-12Make MIPS MT implementation more cache friendly.ths
2008-02-01use the TCG code generatorbellard
2007-12-25Support for VR5432, and some of its special instructions. Original patchths
2007-12-25Improved PABITS handling, and config register fixes.ths
2007-11-18Fix MIPS64 R2 instructions.ths
2007-11-17Fix int/float inconsistencies.pbrook
2007-11-09Use FORCE_RET, scrap RETURN which was implemented in target-specific code.ths
2007-11-08Clean out the N32 macros from target-mips, and introduce MIPS ABI specificths
2007-10-29Restrict CP0_PerfCnt to legal values.ths
2007-10-28Implement missing MIPS supervisor mode bits.ths
2007-10-27Add sharable clz/clo inline functions and use them for the mips target.ths
2007-10-26The other half of the mul64 rework. Sorry for the breakage, I committedths
2007-10-24Force proper sign extension for mfc0/mfhc0 on MIPS64.ths
2007-10-23Fix writable length of the index register.ths
2007-10-23Fix CLO calculation for MIPS64. And a small code cleanup.ths
2007-10-09Use always_inline in the MIPS support where applicable.ths
2007-09-30Code provision for n32/n64 mips userland emulation. Not functional yet.ths
2007-09-26hflags computation cleanup, by Aurelien Jarno.ths
2007-09-25Timer start/stop implementation, by Aurelien Jarno.ths
2007-09-25Optimise instructions accessing CP0, by Aurelien Jarno.ths
2007-09-24Per-CPU instruction decoding implementation, by Aurelien Jarno.ths
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths
2007-09-06Partial support for 34K multithreading, not functional yet.ths
2007-08-26Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno.ths
2007-06-25MIPS64 improvements, based on a patch by Aurelien Jarno.ths
2007-06-23Handle MIPS64 SEGBITS value correctly.ths
2007-06-22Fix write to K0 bits in Config0, by Aurelien Jarno.ths
2007-05-29Don't check the FPU state for each FPU instruction, use hflags toths
2007-05-28Handle PX/UX status flags correctly, by Aurelien Jarno.ths
2007-05-28MIPS64 addressing fixes, by Aurelien Jarno.ths
2007-05-23The 24k wants more watch and srsmap registers.ths
2007-05-23The previous patch to make breakpoints work was a performanceths
2007-05-20Fix indexed FP load/store instructions.ths
2007-05-19More MIPS 64-bit FPU support.ths
2007-05-19Fix slti/sltiu for MIPS64, by Aurelien Jarno.ths
2007-05-18- Move FPU exception handling into helper functions, since they are big.ths
2007-05-18Work around the lack of proper handling for self-modifying code.ths
2007-05-16More generic 64 bit multiplication support, by Aurelien Jarno.ths
2007-05-13Full MIPS64 MMU implementation, by Aurelien Jarno.ths
2007-05-13Fix mfc0 and dmtc0 instructions on MIPS64, by Aurelien Jarno.ths
2007-05-13Delete misleading comment.ths
2007-05-13MMU code improvements, by Aurelien Jarno.ths
2007-05-13MIPS TLB style selection at runtime, by Herve Poussineau.ths
2007-05-11Implemented cabs FP instructions, and improve exception handling forths
2007-05-11Implement FP madd/msub, wire up bc1any[24][ft].ths
2007-05-09Fix MIPS64 address computation specialcase, by Aurelien Jarno.ths
2007-05-08Work around gcc's mips define, spotted by Stefan Weil.ths
2007-05-07MIPS 64-bit FPU support, plus some collateral bugfixes in theths
2007-04-17Choose number of TLBs at runtime, by Herve Poussineau.ths
2007-04-15Don't use T2 for INS, it conflicts with branch delay slot handling.ths