Age | Commit message (Expand) | Author |
2015-10-30 | target-mips: add PC, XNP reg numbers to RDHWR | Yongbok Kim |
2015-09-18 | target-mips: improve exception handling | Pavel Dovgaluk |
2015-06-26 | target-mips: add Unified Hosting Interface (UHI) support | Leon Alrae |
2015-06-11 | target-mips: add ERETNC instruction and Config5.LLB bit | Leon Alrae |
2015-06-11 | target-mips: Misaligned memory accesses for MSA | Yongbok Kim |
2014-12-16 | target-mips: Fix CP0.Config3.ISAOnExc write accesses | Maciej W. Rozycki |
2014-11-03 | target-mips: add MSA MI10 format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA 2RF format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA VEC/2R format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA 3RF format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA ELM format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA 3R format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA BIT format instructions | Yongbok Kim |
2014-11-03 | target-mips: add MSA I5 format instruction | Yongbok Kim |
2014-11-03 | target-mips: add MSA I8 format instructions | Yongbok Kim |
2014-11-03 | target-mips: add TLBINV support | Leon Alrae |
2014-11-03 | target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1} | Leon Alrae |
2014-10-14 | target-mips: add new Floating Point Comparison instructions | Yongbok Kim |
2014-10-14 | target-mips: add new Floating Point instructions | Leon Alrae |
2014-10-13 | target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructions | Yongbok Kim |
2014-05-28 | tcg: Invert the inclusion of helper.h | Richard Henderson |
2014-02-10 | target-mips: add user-mode FR switch support for MIPS32r5 | Petar Jovanovic |
2014-02-10 | target-mips: add support for CP0_Config5 | Petar Jovanovic |
2014-02-10 | target-mips: add support for CP0_Config4 | Petar Jovanovic |
2013-10-10 | tcg: Remove stray semi-colons from target-*/helper.h | Richard Henderson |
2013-02-23 | target-mips: Use mul[us]2 in [D]MULT[U] insns | Richard Henderson |
2013-01-31 | target-mips: implement DSP (d)append sub-class with TCG | Aurelien Jarno |
2012-12-19 | exec: move include files to include/exec/ | Paolo Bonzini |
2012-10-31 | target-mips: implement unaligned loads using TCG | Aurelien Jarno |
2012-10-31 | target-mips: use the softfloat floatXX_muladd functions | Aurelien Jarno |
2012-10-31 | target-mips: Add ASE DSP accumulator instructions | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP compare-pick instructions | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP bit/manipulation instructions | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP multiply instructions | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP GPR-based shift instructions | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP arithmetic instructions | Jia Liu |
2012-10-28 | target-mips: rename helper flags | Aurelien Jarno |
2012-09-19 | target-mips: Implement Loongson Multimedia Instructions | Richard Henderson |
2012-09-15 | target-mips: switch to AREG0 free mode | Blue Swirl |
2012-03-24 | target-mips: Add compiler attribute to some functions which don't return | Stefan Weil |
2011-09-06 | mips: Hook in more reg accesses via mttr/mftr | Edgar E. Iglesias |
2010-12-22 | target-mips: fix translation of MT instructions | Nathan Froyd |
2010-07-25 | mips: more fixes to the MIPS interrupt glue logic | Aurelien Jarno |
2010-06-09 | target-mips: microMIPS ASE support | Nathan Froyd |
2009-11-30 | target-mips: use physical address in lladdr | Aurelien Jarno |
2009-11-22 | target-mips: make CP0_LLAddr register CPU dependent | Aurelien Jarno |
2009-04-06 | target-mips: use the TCG_CALL_PURE and TCG_CALL_CONST for some helpers | aurel32 |
2009-03-08 | target-mips: rename helpers from do_ to helper_ | aurel32 |
2008-11-17 | TCG variable type checking. | pbrook |
2008-11-11 | target-mips: convert bit shuffle ops to TCG | aurel32 |