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path: root/target-mips/helper.h
AgeCommit message (Collapse)Author
2012-09-19target-mips: Implement Loongson Multimedia InstructionsRichard Henderson
Implements all of the COP2 instructions except for the S<cond> family of comparisons. The documentation is unclear for those. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-15target-mips: switch to AREG0 free modeBlue Swirl
Add an explicit CPUState parameter instead of relying on AREG0 and switch to AREG0 free mode. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Aurelien Jarno <aurelien@aurel32.net>
2012-03-24target-mips: Add compiler attribute to some functions which don't returnStefan Weil
helper_raise_exception_err does not return, nor do helper_raise_exception and do_unaligned_access. Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-06mips: Hook in more reg accesses via mttr/mftrEdgar E. Iglesias
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-12-22target-mips: fix translation of MT instructionsNathan Froyd
The translation of dmt/emt/dvpe/evpe was doing the moral equivalent of: int x; ... /* no initialization of x */ x = f (x); which confused later bits of TCG rather badly, leading to crashes. Fix the helpers to only return results (those instructions have no inputs), and fix the translation code accordingly. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-07-25mips: more fixes to the MIPS interrupt glue logicAurelien Jarno
Commit 36388314febad3d7675ab919287f03733a560ff6 moved most of the interrupt logic to cpu-exec.c. Remove the remaining useless code and fix software interrupts. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Edgar E. Iglesias <edgar@axis.com> Tested-by: Edgar E. Iglesias <edgar@axis.com>
2010-06-09target-mips: microMIPS ASE supportNathan Froyd
Add instruction decoding for the microMIPS ASE. All we do is decode and then forward to the existing gen_* routines. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-30target-mips: use physical address in lladdrAurelien Jarno
Currently the ll/sc instructions use the virtual address in both user and system mode. Use the physical address insteead in system mode. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-22target-mips: make CP0_LLAddr register CPU dependentAurelien Jarno
Depending on the CPU, CP0_LLAddr is either read-only or read-write, and the returned value can be shifted by a variable amount of bits. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
2009-04-06target-mips: use the TCG_CALL_PURE and TCG_CALL_CONST for some helpersaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7009 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-08target-mips: rename helpers from do_ to helper_aurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6773 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17TCG variable type checking.pbrook
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11target-mips: convert bit shuffle ops to TCGaurel32
Bit shuffle operations can be written with very few TCG instructions (between 5 and 8), so it is worth converting them to TCG. This code also move all bit shuffle generation code to a separate function in order to have a cleaner exception code path, that is it doesn't store back the TCG register to the target register after the exception, as the TCG register doesn't exist anymore. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5679 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11target-mips: convert bitfield ops to TCGaurel32
Bitfield operations can be written with very few TCG instructions (between 2 and 5), so it is worth converting them to TCG. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5678 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11target-mips: fix mft* helpers/callaurel32
This patch attempts to fix mft* helpers and the associated TCG calls. mft* helpers do not take a register in argument, however: - some helpers are called with an argument while they do not take one. - some helpers are declared with an argument they don't use. Acked-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5674 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23Less hardcoding of TARGET_USER_ONLY.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4928 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-09Use temporary registers for the MIPS FPU emulation.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4861 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29Remove unnecessary helper arguments, and fix some typos.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4802 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-27Avoid unused input arguments which triggered tcg errors. Spotted byths
Stefan Weil. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4795 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-24Remove remaining uses of T0 in the MIPS target.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4788 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-24Use temporaries instead of fixed registers for some instructions.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4784 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-23Pass T0/T1 explicitly to helper functions, and clean up a few dyngenths
leftovers. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4780 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-20Convert unaligned load/store to TCG.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4759 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-20Convert vr54xx multiply instructions to TCG.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4756 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-19Convert remaining MIPS FP instructions to TCG.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4753 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-12Switch the standard multiplication instructions to TCG.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4740 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-12Switch bitfield instructions and assorted special ops to TCG.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4739 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-12TCGify a few more instructions.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4736 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-11Call most FP helpers without deroute through op.cths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4734 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09Switch remaining CP0 instructions to TCG or helper functions.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4708 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-08Register helper functions.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4700 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21Switch MIPS clo/clz and the condition tests to TCG.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4507 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18Add file left out from previous commit.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4497 c046a42c-6fe2-441c-8c8c-71466251a162
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