| Age | Commit message (Expand) | Author |
|---|
| 2007-06-23 | Handle MIPS64 SEGBITS value correctly. | ths |
| 2007-05-28 | Handle PX/UX status flags correctly, by Aurelien Jarno. | ths |
| 2007-05-23 | The 24k wants more watch and srsmap registers. | ths |
| 2007-05-13 | Full MIPS64 MMU implementation, by Aurelien Jarno. | ths |
| 2007-05-13 | MMU code improvements, by Aurelien Jarno. | ths |
| 2007-05-13 | MIPS TLB style selection at runtime, by Herve Poussineau. | ths |
| 2007-05-09 | Preliminary MIPS 64-bit MMU implementation, by Aurelien Jarno. | ths |
| 2007-05-07 | MIPS 64-bit FPU support, plus some collateral bugfixes in the | ths |
| 2007-05-07 | Clear BD slot on next exception if appropriate. | ths |
| 2007-04-13 | Another fix for CP0 Cause register handling. | ths |
| 2007-04-07 | cpu_get_phys_page_debug should return target_phys_addr_t | j_mayer |
| 2007-04-06 | Fix handling of ADES exceptions. | ths |
| 2007-04-05 | fix branch delay slot cornercases. | ths |
| 2007-04-05 | Handle EBase properly. | ths |
| 2007-03-30 | Squash logic bugs while they are fresh... | ths |
| 2007-03-30 | Sanitize mips exception handling. | ths |
| 2007-03-18 | Fix BD flag handling, cause register contents, implement some more bits | ths |
| 2007-02-20 | Replace TLSZ with TARGET_FMT_lx. | ths |
| 2007-02-18 | Fix sign-extension of VPN field in TLB, by Herve Poussineau. | ths |
| 2007-01-22 | Fix PageMask handling, second part. | ths |
| 2007-01-21 | Bring TLB / PageSize handling in line with real hardware behaviour. | ths |
| 2007-01-03 | moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - suppr... | bellard |
| 2006-12-21 | Scrap SIGN_EXTEND32. | ths |
| 2006-12-21 | Preliminiary MIPS64 support, disabled by default due to performance impact. | ths |
| 2006-12-10 | Handle invalid accesses as SIGILL for mips/mipsel userland emulation. | ths |
| 2006-12-07 | Fix reset handling, CP0 isn't enabled by default (a fact which doesn't | ths |
| 2006-12-06 | Add MIPS32R2 instructions, and generally straighten out the instruction | ths |
| 2006-12-06 | MIPS TLB performance improvements, by Daniel Jacobowitz. | ths |
| 2006-06-26 | consistent update of ERL and EXL | bellard |
| 2006-06-14 | use constants for TLB handling (Thiemo Seufer) | bellard |
| 2006-05-22 | fix wrong bitmasks for CP0_Context and CP0_EntryHi (Thiemo Seufer) | bellard |
| 2006-05-22 | cosmetics (Thiemo Seufer) | bellard |
| 2006-05-22 | mips cleanup (Thiemo Seufer) | bellard |
| 2006-03-11 | Clear MIPS_HFLAG_BMASK for ErrorEPC (Thiemo Seufer). | pbrook |
| 2006-03-11 | e bitfields in mips TLB structures (Thiemo Seufer). | pbrook |
| 2005-12-05 | MIPS fixes (Daniel Jacobowitz) | bellard |
| 2005-07-04 | correct split between helper.c and op_helper.c - cosmetics | bellard |
| 2005-07-02 | TLB reload exception vector (Ralf Baechle) | bellard |
| 2005-07-02 | fixed c0_context in tlb exception (Ralf Baechle) | bellard |
| 2005-07-02 | use MIPS_TLB_NB constant (Ralf Baechle) | bellard |
| 2005-07-02 | remove nonsense exception code (Ralf Baechle) | bellard |
| 2005-07-02 | MIPS_USES_R4K_TLB typo | bellard |
| 2005-07-02 | MIPS target (Jocelyn Mayer) | bellard |
