Age | Commit message (Expand) | Author |
2008-11-11 | target-mips: optimize gen_op_addr_add() (2/2) | aurel32 |
2008-09-18 | Move the active FPU registers into env again, and use more TCG registers | ths |
2008-09-14 | MIPS: remove empty cpu_mips_irqctrl_init() | aurel32 |
2008-08-30 | Fix some warnings that would be generated by gcc -Wredundant-decls | blueswir1 |
2008-07-23 | Use plain standard inline. | ths |
2008-07-09 | Use temporary registers for the MIPS FPU emulation. | ths |
2008-06-24 | Remove remaining uses of T0 in the MIPS target. | ths |
2008-06-24 | T1 is now dead. | ths |
2008-06-23 | Pass T0/T1 explicitly to helper functions, and clean up a few dyngen | ths |
2008-06-20 | Delete obsolete prototypes. | ths |
2008-06-12 | Switch the standard multiplication instructions to TCG. | ths |
2008-06-12 | TCGify a few more instructions. | ths |
2008-06-11 | Call most FP helpers without deroute through op.c | ths |
2008-06-11 | Move FP TNs to cpu env. | ths |
2008-06-09 | Switch remaining CP0 instructions to TCG or helper functions. | ths |
2008-05-18 | Switch most MIPS logical and arithmetic instructions to TCG. | ths |
2008-05-07 | Delete redundant prototype. | ths |
2008-05-06 | Use TCG for MIPS GPR moves. | ths |
2008-05-04 | Simplify mips branch handling. Retire T2 from use. Use TCG for branches. | ths |
2008-01-09 | Fix typo which broke MIPS32R2 64-bit FPU support. | ths |
2007-12-30 | MIPS COP1X (and related) instructions, by Richard Sandiford. | ths |
2007-12-25 | Support for VR5432, and some of its special instructions. Original patch | ths |
2007-11-09 | Use FORCE_RET, scrap RETURN which was implemented in target-specific code. | ths |
2007-11-08 | Clean out the N32 macros from target-mips, and introduce MIPS ABI specific | ths |
2007-10-28 | Implement missing MIPS supervisor mode bits. | ths |
2007-10-27 | Add sharable clz/clo inline functions and use them for the mips target. | ths |
2007-10-14 | Replace is_user variable with mmu_idx in softmmu core, | j_mayer |
2007-10-09 | Use always_inline in the MIPS support where applicable. | ths |
2007-10-09 | Fix [ls][wd][lr] instructions, by Aurelien Jarno. | ths |
2007-09-30 | Code provision for n32/n64 mips userland emulation. Not functional yet. | ths |
2007-09-29 | Supervisor mode implementation, by Aurelien Jarno. | ths |
2007-09-26 | hflags computation cleanup, by Aurelien Jarno. | ths |
2007-09-25 | Timer start/stop implementation, by Aurelien Jarno. | ths |
2007-09-16 | find -type f | xargs sed -i 's/[\t ]$//g' # on most files | ths |
2007-09-06 | Partial support for 34K multithreading, not functional yet. | ths |
2007-06-03 | Clean up of some target specifics in exec.c/cpu-exec.c. | ths |
2007-05-19 | More MIPS 64-bit FPU support. | ths |
2007-05-18 | - Move FPU exception handling into helper functions, since they are big. | ths |
2007-05-16 | More generic 64 bit multiplication support, by Aurelien Jarno. | ths |
2007-05-13 | MIPS TLB style selection at runtime, by Herve Poussineau. | ths |
2007-05-07 | MIPS 64-bit FPU support, plus some collateral bugfixes in the | ths |
2007-04-29 | Kill broken host register definitions, thanks to Paul Brook and Herve | ths |
2007-04-15 | Fix qemu SIGFPE caused by division-by-zero due to underflow. | ths |
2007-04-01 | Actually enable 64bit configuration. | ths |
2007-03-31 | Malta CBUS UART support. | ths |
2007-03-23 | Fix enough FPU/R2 support to get 24Kf going. | ths |
2007-03-19 | SPARC host fixes, by Ben Taylor. | ths |
2007-02-28 | MIPS FPU dynamic activation, part 1, by Herve Poussineau. | ths |
2007-02-02 | Sparc arm/mips/sparc register patch, by Martin Bochnig. | ths |
2007-01-24 | Reworking MIPS interrupt handling, by Aurelien Jarno. | ths |