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path: root/target-mips/cpu.h
AgeCommit message (Expand)Author
2007-03-02MIPS Userland TLS register emulation, by Daniel Jacobowitz.ths
2007-02-28MIPS FPU dynamic activation, part 1, by Herve Poussineau.ths
2007-02-20Replace TLSZ with TARGET_FMT_lx.ths
2007-01-24EBase is limited to KSEG0/KSEG1 even on 64bit CPUs.ths
2007-01-24Reworking MIPS interrupt handling, by Aurelien Jarno.ths
2007-01-23Implementing dmfc/dmtc.ths
2007-01-22Fix PageMask handling, second part.ths
2006-12-23Check ELF binaries for machine type and endianness.ths
2006-12-21Scrap SIGN_EXTEND32.ths
2006-12-21Preliminiary MIPS64 support, disabled by default due to performance impact.ths
2006-12-06Add MIPS32R2 instructions, and generally straighten out the instructionths
2006-12-06Halt/reboot support for Linux, by Daniel Jacobowitz. This is a band-aidths
2006-12-06MIPS TLB performance improvements, by Daniel Jacobowitz.ths
2006-06-14Solaris/SPARC host port (Ben Taylor)bellard
2006-06-14use constants for TLB handling (Thiemo Seufer)bellard
2006-06-14mips config fixes (initial patch by Stefan Weil)bellard
2006-06-14MIPS FPU support (Marius Goeger)bellard
2006-03-11Rename MIPS_HFLAG(S)_TMASK (Thiemo Seufer).pbrook
2006-03-11e bitfields in mips TLB structures (Thiemo Seufer).pbrook
2005-12-05MIPS fixes (Daniel Jacobowitz)bellard
2005-11-20added CPU_COMMON and CPUState.tb_jmp_cache[]bellard
2005-07-04correct split between helper.c and op_helper.c - cosmeticsbellard
2005-07-02MIPS target (Jocelyn Mayer)bellard
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