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path: root/target-mips/cpu.h
AgeCommit message (Expand)Author
2016-01-23target-mips/cpu.h: Fix spell errorDongxue Zhang
2015-11-24target-mips: flush QEMU TLB when disabling 64-bit addressingLeon Alrae
2015-10-30target-mips: add PC, XNP reg numbers to RDHWRYongbok Kim
2015-10-29target-mips: update writing to CP0.Status.KX/SX/UX in MIPS Release R6Leon Alrae
2015-10-29target-mips: move the test for enabled interrupts to a separate functionLeon Alrae
2015-10-07target-*: Drop cpu_gen_code defineRichard Henderson
2015-10-07target-mips: Add delayed branch state to insn_startRichard Henderson
2015-09-25mips: Remove ELF_MACHINE from cpu.hPeter Crosthwaite
2015-09-18target-mips: improve exception handlingPavel Dovgaluk
2015-09-11tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt
2015-08-13target-mips: update mips32r5-generic into P5600Yongbok Kim
2015-07-09cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite
2015-06-12target-mips: add MTHC0 and MFHC0 instructionsLeon Alrae
2015-06-12target-mips: add CP0.PageGrain.ELPA supportLeon Alrae
2015-06-12target-mips: extend selected CP0 registers to 64-bits in MIPS32Leon Alrae
2015-06-11target-mips: add ERETNC instruction and Config5.LLB bitLeon Alrae
2015-06-11target-mips: add Config5.FRE support allowing Status.FR=0 emulationLeon Alrae
2015-03-11Merge remote-tracking branch 'remotes/lalrae/tags/mips-20150311' into stagingPeter Maydell
2015-03-11target-mips: add missing MSACSR and restore fp_status and hflagsLeon Alrae
2015-03-11target-mips: replace cpu_save/cpu_load with VMStateDescriptionLeon Alrae
2015-03-10cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost
2015-01-20exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell
2014-12-16target-mips: Add missing calls to synchronise SoftFloat statusMaciej W. Rozycki
2014-12-16target-mips: Correct 32-bit address space wrappingMaciej W. Rozycki
2014-12-16target-mips: Tighten ISA level checksMaciej W. Rozycki
2014-12-16target-mips: Correct the writes to Status and Cause registers via gdbstubMaciej W. Rozycki
2014-12-16target-mips: Make CP0.Config4 and CP0.Config5 registers signedMaciej W. Rozycki
2014-11-07mips: Add macros for CP0.Config3 and CP0.Config4 bitsMaciej W. Rozycki
2014-11-03target-mips: remove duplicated mips/ieee mapping functionYongbok Kim
2014-11-03target-mips: add MSA defines and data structureYongbok Kim
2014-11-03target-mips: CP0_Status.CU0 no longer allows the user to access CP0Leon Alrae
2014-11-03target-mips: implement forbidden slotLeon Alrae
2014-11-03target-mips: add Config5.SBRILeon Alrae
2014-11-03target-mips: update cpu_save/cpu_load to support new registersLeon Alrae
2014-11-03target-mips: add BadInstr and BadInstrP supportLeon Alrae
2014-11-03target-mips: add TLBINV supportLeon Alrae
2014-11-03target-mips: add new Read-Inhibit and Execute-Inhibit exceptionsLeon Alrae
2014-11-03target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1}Leon Alrae
2014-11-03target-mips: add RI and XI fields to TLB entryLeon Alrae
2014-11-03target-mips: add KScratch registersLeon Alrae
2014-10-14target-mips: fix broken MIPS16 and microMIPSYongbok Kim
2014-10-13target-mips: Status.UX/SX/KX enable 32-bit address wrappingLeon Alrae
2014-06-18target-mips: implement UserLocal RegisterPetar Jovanovic
2014-06-05softmmu: move ALIGNED_ONLY to cpu.hPaolo Bonzini
2014-03-27target-mips: Avoid shifting left into sign bitPeter Maydell
2014-03-13cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber
2014-03-13cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber
2014-03-13cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber
2014-02-10target-mips: add support for CP0_Config5Petar Jovanovic
2014-02-10target-mips: add support for CP0_Config4Petar Jovanovic
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