Age | Commit message (Expand) | Author |
2008-02-12 | Make MIPS MT implementation more cache friendly. | ths |
2007-12-30 | MIPS COP1X (and related) instructions, by Richard Sandiford. | ths |
2007-12-26 | De-cruft exception definitions, and implement nicer debug output. | ths |
2007-12-25 | Improved PABITS handling, and config register fixes. | ths |
2007-11-10 | added cpu_model parameter to cpu_init() | bellard |
2007-11-09 | Move kernel loader parameters from the cpu state to being board specific. | ths |
2007-10-28 | Implement missing MIPS supervisor mode bits. | ths |
2007-10-20 | Handle IBE on MIPS properly. | ths |
2007-10-14 | Replace is_user variable with mmu_idx in softmmu core, | j_mayer |
2007-10-12 | Unify '-cpu ?' option. | j_mayer |
2007-09-27 | Move get_sp_from_cpustate from cpu.h to target_signal.h. | ths |
2007-09-27 | linux-user sigaltstack() syscall, by Thayne Harbaugh. | ths |
2007-09-25 | Optimise instructions accessing CP0, by Aurelien Jarno. | ths |
2007-09-24 | Per-CPU instruction decoding implementation, by Aurelien Jarno. | ths |
2007-09-06 | Partial support for 34K multithreading, not functional yet. | ths |
2007-06-23 | Handle MIPS64 SEGBITS value correctly. | ths |
2007-06-03 | Move target-specific defines to the target directories. | ths |
2007-05-31 | Don't kill the registered irqs on reset. | ths |
2007-05-30 | Fix CPU (re-)selection on reset. | ths |
2007-05-29 | Fix usermode check, thanks Aurelien Jarno. | ths |
2007-05-29 | Don't check the FPU state for each FPU instruction, use hflags to | ths |
2007-05-28 | Handle PX/UX status flags correctly, by Aurelien Jarno. | ths |
2007-05-23 | The 24k wants more watch and srsmap registers. | ths |
2007-05-18 | - Move FPU exception handling into helper functions, since they are big. | ths |
2007-05-13 | MIPS linux-user update. | ths |
2007-05-13 | MIPS TLB style selection at runtime, by Herve Poussineau. | ths |
2007-05-07 | MIPS 64-bit FPU support, plus some collateral bugfixes in the | ths |
2007-04-17 | Choose number of TLBs at runtime, by Herve Poussineau. | ths |
2007-04-07 | Unify IRQ handling. | pbrook |
2007-04-05 | 64bit MIPS FPUs have 32 registers. | ths |
2007-03-30 | Fix typo, suggested by Ben Taylor. | ths |
2007-03-30 | Sanitize mips exception handling. | ths |
2007-03-23 | Fix enough FPU/R2 support to get 24Kf going. | ths |
2007-03-18 | MIPS -cpu selection support, by Herve Poussineau. | ths |
2007-03-02 | MIPS Userland TLS register emulation, by Daniel Jacobowitz. | ths |
2007-02-28 | MIPS FPU dynamic activation, part 1, by Herve Poussineau. | ths |
2007-02-20 | Replace TLSZ with TARGET_FMT_lx. | ths |
2007-01-24 | EBase is limited to KSEG0/KSEG1 even on 64bit CPUs. | ths |
2007-01-24 | Reworking MIPS interrupt handling, by Aurelien Jarno. | ths |
2007-01-23 | Implementing dmfc/dmtc. | ths |
2007-01-22 | Fix PageMask handling, second part. | ths |
2006-12-23 | Check ELF binaries for machine type and endianness. | ths |
2006-12-21 | Scrap SIGN_EXTEND32. | ths |
2006-12-21 | Preliminiary MIPS64 support, disabled by default due to performance impact. | ths |
2006-12-06 | Add MIPS32R2 instructions, and generally straighten out the instruction | ths |
2006-12-06 | Halt/reboot support for Linux, by Daniel Jacobowitz. This is a band-aid | ths |
2006-12-06 | MIPS TLB performance improvements, by Daniel Jacobowitz. | ths |
2006-06-14 | Solaris/SPARC host port (Ben Taylor) | bellard |
2006-06-14 | use constants for TLB handling (Thiemo Seufer) | bellard |
2006-06-14 | mips config fixes (initial patch by Stefan Weil) | bellard |