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QEMU is a generic and open source machine & userspace emulator and virtualizer
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target-mips
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cpu.h
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Author
2010-07-24
mips: Correct MIPS interrupt glue logic for icount
Edgar E. Iglesias
2010-07-03
remove exec-all.h inclusion from cpu.h
Paolo Bonzini
2010-07-03
move cpu_pc_from_tb to target-*/exec.h
Paolo Bonzini
2010-06-09
target-mips: add microMIPS exception handler support
Nathan Froyd
2010-03-12
Target specific usermode cleanup
Paul Brook
2010-02-06
target-mips: don't call cpu_loop_exit() from helper.c
Aurelien Jarno
2009-12-13
target-mips: add new HFLAGs for JALX and 16/32-bit delay slots
Nathan Froyd
2009-11-30
target-mips: add a function to do virtual -> physical translations
Aurelien Jarno
2009-11-22
target-mips: fix physical address type in MMU functions
Aurelien Jarno
2009-11-22
target-mips: make CP0_LLAddr register CPU dependent
Aurelien Jarno
2009-11-22
target-mips: rename CP0_LLAddr into lladdr
Aurelien Jarno
2009-11-14
mips: fix cpu_reset memory leak
Blue Swirl
2009-10-01
Revert "Get rid of _t suffix"
Anthony Liguori
2009-10-01
Get rid of _t suffix
malc
2009-08-24
cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal
Nathan Froyd
2009-07-27
rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN
Juan Quintela
2009-07-27
change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION}
Juan Quintela
2009-07-09
MIPS atomic instructions
Paul Brook
2009-07-09
MIPS usermode TLS register
Paul Brook
2009-03-29
target-mips: optimize gen_compute_branch()
aurel32
2009-03-08
target-mips: rename helpers from do_ to helper_
aurel32
2009-03-07
The _exit syscall is used for both thread termination in NPTL applications,
pbrook
2008-12-20
Fix remaining compiler warnings for mips targets.
ths
2008-11-18
Refactor translation block CPU state handling (Jan Kiszka)
aliguori
2008-11-18
Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)
aliguori
2008-11-11
target-mips: optimize gen_op_addr_add() (2/2)
aurel32
2008-10-06
Show size for unassigned accesses (Robert Reif)
blueswir1
2008-09-18
Move the active FPU registers into env again, and use more TCG registers
ths
2008-07-23
Less hardcoding of TARGET_USER_ONLY.
ths
2008-07-09
Use temporary registers for the MIPS FPU emulation.
ths
2008-07-01
Move interrupt_request and user_mode_only to common cpu state.
pbrook
2008-06-30
Move CPU save/load registration to common code.
pbrook
2008-06-29
Add instruction counter.
pbrook
2008-06-27
More efficient target register / TC accesses.
ths
2008-06-24
Remove remaining uses of T0 in the MIPS target.
ths
2008-06-24
T1 is now dead.
ths
2008-06-11
Move FP TNs to cpu env.
ths
2008-05-30
Fix typo.
pbrook
2008-05-30
Move clone() register setup to target specific code. Handle fork-like clone.
pbrook
2008-05-29
Push common interrupt variables to cpu-defs.h (Glauber Costa)
bellard
2008-05-28
moved halted field to CPU_COMMON
bellard
2008-05-28
Honour current_tc for MIPS M{T,F}{HI,LO}, by Richard Sandiford.
ths
2008-05-06
Use TCG for MIPS GPR moves.
ths
2008-05-04
Simplify mips branch handling. Retire T2 from use. Use TCG for branches.
ths
2008-02-12
Make MIPS MT implementation more cache friendly.
ths
2007-12-30
MIPS COP1X (and related) instructions, by Richard Sandiford.
ths
2007-12-26
De-cruft exception definitions, and implement nicer debug output.
ths
2007-12-25
Improved PABITS handling, and config register fixes.
ths
2007-11-10
added cpu_model parameter to cpu_init()
bellard
2007-11-09
Move kernel loader parameters from the cpu state to being board specific.
ths
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