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AgeCommit message (Expand)Author
2008-05-21convert eflags manipulation insns to TCGbellard
2008-05-21convert remaining segment handling to TCGbellard
2008-05-21converted LSL/LAR/VERW/VERR to TCG - force 16 bit memory access for LSL/LARbellard
2008-05-21suppressed no longer used opsbellard
2008-05-21converted INTO/CMPXCHG8B to TCGbellard
2008-05-21converted BCD ops to TCGbellard
2008-05-21converted MUL/IMUL to TCGbellard
2008-05-18converted string OPs and LOOP insns to TCGbellard
2008-05-18fixed INC/DEC condition codesbellard
2008-05-17converted sign extension ops to TCGbellard
2008-05-17MONITOR insn address generation fix - converted XLAT to TCGbellard
2008-05-17BSR/BSF TCG conversionbellard
2008-05-17converted bit test operations to TCGbellard
2008-05-17moved eflags computation outside op.cbellard
2008-05-17converted adc, sbb, cmpxchg to TCGbellard
2008-05-17converted condition code supprot to TCG - converted shift ops to TCGbellard
2008-05-15converted more helpers to TCG - fixed some SVM issuesbellard
2008-05-13i386 specific TODObellard
2008-05-12compilation fixbellard
2008-05-12converted more helpers to TCGbellard
2008-05-12removed unused codebellard
2008-05-12FPU fixesbellard
2008-05-12converted x87 FPU ops to TCGbellard
2008-05-12converted SSE/MMX ops to TCGbellard
2008-05-12use TCG for MMX/SSE memory accessesbellard
2008-05-12char is only for stringsbellard
2008-05-10no need to define global registers in cpu-exec.cbellard
2008-05-04Correctly save and restore env->a20_mask now that it is a 64-bitaurel32
2008-05-04remove target ifdefs from vl.caurel32
2008-04-28Factorize code in translate.caurel32
2008-04-27Use correct types to enable > 2G support, based on a patch fromaurel32
2008-04-22Fix PHYS_ADDR_MASK: upper bits of a PTE are reserved so they are 52 bitsaurel32
2008-04-22x86/x86-64 MMU PAE fixesaurel32
2008-04-13x86: Introduce CPU_INTERRUPT_NMIaurel32
2008-04-11Remove osdep.c/qemu-img code duplicationaurel32
2008-04-11Remove unused phys_ram_base definition from target-i386/helper.c.aurel32
2008-04-09Check for 3DNow! CPUID at translation timeaurel32
2008-04-08Fix typo in x86 CPU definitions introduced in r4181aurel32
2008-04-08Remove hardcoded values in x86 CPU definitionsaurel32
2008-04-083DNow! instruction set emulationaurel32
2008-03-28x86-64: recompute DF after eflags has been modified when emulating SYSCALLaurel32
2008-03-09 Fix some functions declared () rather than (void) (Ian Jackson)blueswir1
2008-02-24 More helper types, rearrange generic definitionsblueswir1
2008-02-03Add TCG variable opaque type.pbrook
2008-02-03NMI and INTR events injection should not be handled as software interrupts (B...balrog
2008-02-03Make SVM env->cr[8] a valid register (patch from TeLeMan).balrog
2008-02-01use the TCG code generatorbellard
2007-12-24Correct the max cpuid level for each x86 cpu model (Dan Kenigsberg).balrog
2007-12-24SVM enabled processor should provide cpuid Fn8000_000A (Bernhard Kauer).balrog
2007-12-24Fix cmpxchg8b translation (Bernhard Kauer).balrog
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