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path: root/target-i386/helper2.c
AgeCommit message (Expand)Author
2005-07-23x86_64 fixes (initial patch by Filip Navara)bellard
2005-07-03better fpu state dumpbellard
2005-04-23return model id in cpuid for x86_64bellard
2005-02-10enabled MMX, PAE and SEPbellard
2005-01-28physical memory access functionsbellard
2005-01-25Support resolving addresses in PAE mode in cpu_get_phys_page_debugbellard
2005-01-12enable MMX for x86_64 toobellard
2005-01-08MMX/SSE supportbellard
2005-01-03x86_64 target supportbellard
2004-10-09monitor fixesbellard
2004-10-03removed access_type hackbellard
2004-06-22cpu_single_env initbellard
2004-06-20boot to top of 4GB spacebellard
2004-06-20added cpu_reset()bellard
2004-06-19buffer overflow fixbellard
2004-05-08cr0.ET fix (Win95 boot fix)bellard
2004-04-25dump A20 statebellard
2004-03-31win32 port (initial patch by kazu)bellard
2004-03-042.6 kernel compile fixbellard
2004-02-25CR0.MP/EM/TS support - native fpu support in code copy modebellard
2004-02-16experimental code copy support - fixed A20 emulationbellard
2004-02-07fixed WP semanticsbellard
2004-02-03more precise TLB invalidation - init cleanupbellard
2004-01-24combine PDE and PTE protections as in intel specs - added cpu_get_phys_page_d...bellard
2004-01-18fixed dirty bit support for 4M pages (L4 Pistachio fix)bellard
2004-01-13fixed subtle bug: in some cases PG_DIRTY was not set correctlybellard
2004-01-04correct value for ADDSEG is real mode (fixes GRUB boot) - update static prote...bellard
2004-01-04debug fixes - use more generic TLB mappingsbellard
2003-12-02dump irq inhibit flag as it is a part of the cpu statebellard
2003-11-23a20 fixbellard
2003-11-19always completely redefine the TLB in case of MMU faultbellard
2003-11-12dump more registersbellard
2003-11-04a20 supportbellard
2003-10-27full softmmu supportbellard
2003-09-30new directory structurebellard
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