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2011-03-15x86: Optionally avoid injecting AO MCEs while others are pendingJan Kiszka
Allow to tell cpu_x86_inject_mce that it should ignore Action Optional MCE events when the target VCPU is still processing another one. This will be used by KVM soon. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15x86: Refine error reporting of MCE injection servicesJan Kiszka
As this service is used by the human monitor, make sure that errors get reported to the right channel, and also raise the verbosity. This requires to move Monitor typedef in qemu-common.h to resolve the include dependency. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15x86: Small cleanups of MCE helpersJan Kiszka
Fix some code style issues, use proper headers, and align to cpu_x86 naming scheme. No functional changes. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15x86: Perform implicit mcg_status resetJan Kiszka
Reorder mcg_status in CPUState to achieve automatic clearing on reset. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-02-08x86: Fix MCA broadcast parameters for TCG caseJan Kiszka
When broadcasting MCEs, we need to set MCIP and RIPV in mcg_status like it is done for KVM. Use the symbolic constants at this chance. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-23x86: Optionally dump code bytes on cpu_dump_stateJan Kiszka
Introduce the cpu_dump_state flag CPU_DUMP_CODE and implement it for x86. This writes out the code bytes around the current instruction pointer. Make use of this feature in KVM to help debugging fatal vm exits. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-21Add function for checking mca broadcast of CPUJin Dongming
Add function for checking whether current CPU support mca broadcast. Signed-off-by: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-21Add "broadcast" option for mce commandJin Dongming
When the following test case is injected with mce command, maybe user could not get the expected result. DATA command cpu bank status mcg_status addr misc (qemu) mce 1 1 0xbd00000000000000 0x05 0x1234 0x8c Expected Result panic type: "Fatal Machine check" That is because each mce command can only inject the given cpu and could not inject mce interrupt to other cpus. So user will get the following result: panic type: "Fatal machine check on current CPU" "broadcast" option is used for injecting dummy data into other cpus. Injecting mce with this option the expected result could be gotten. Usage: Broadcast[on] command broadcast cpu bank status mcg_status addr misc (qemu) mce -b 1 1 0xbd00000000000000 0x05 0x1234 0x8c Broadcast[off] command cpu bank status mcg_status addr misc (qemu) mce 1 1 0xbd00000000000000 0x05 0x1234 0x8c Signed-off-by: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-01-21Clean up cpu_inject_x86_mce()Jin Dongming
Clean up cpu_inject_x86_mce() for later patch. Signed-off-by: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-12-27x86: Filter out garbage from segment flags dumpJan Kiszka
Only bits 8..23 of the segment flags contain valid data, so only dump those when printing the CPU state. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-10-30target-xxx: Use fprintf_function (format checking)Stefan Weil
fprintf_function uses format checking with GCC_FMT_ATTR. Format errors were fixed in * target-i386/helper.c * target-mips/translate.c * target-ppc/translate.c Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-10-20MCE: Relay UCR MCE to guestMarcelo Tosatti
Port qemu-kvm's commit 4b62fff1101a7ad77553147717a8bd3bf79df7ef Author: Huang Ying <ying.huang@intel.com> Date: Mon Sep 21 10:43:25 2009 +0800 MCE: Relay UCR MCE to guest UCR (uncorrected recovery) MCE is supported in recent Intel CPUs, where some hardware error such as some memory error can be reported without PCC (processor context corrupted). To recover from such MCE, the corresponding memory will be unmapped, and all processes accessing the memory will be killed via SIGBUS. For KVM, if QEMU/KVM is killed, all guest processes will be killed too. So we relay SIGBUS from host OS to guest system via a UCR MCE injection. Then guest OS can isolate corresponding memory and kill necessary guest processes only. SIGBUS sent to main thread (not VCPU threads) will be broadcast to all VCPU threads as UCR MCE. aliguori: fix build Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-10-20kvm: x86: add mce supportMarcelo Tosatti
Port qemu-kvm's MCE support commit c68b2374c9048812f488e00ffb95db66c0bc07a7 Author: Huang Ying <ying.huang@intel.com> Date: Mon Jul 20 10:00:53 2009 +0800 Add MCE simulation support to qemu/kvm KVM ioctls are used to initialize MCE simulation and inject MCE. The real MCE simulation is implemented in Linux kernel. The Kernel part has been merged. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-06-27x86: Fix INIT processingJan Kiszka
This fixes a regression of 0e26b7b892: Reset halted also on INIT. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19apic: avoid passing CPUState from CPU codeBlue Swirl
Pass only APICState when accessing APIC from CPU code. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-26target-i386: print EFER in cpu_dump_stateMarcelo Tosatti
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-04-08target-i386: Fix compiler warningStefan Weil
With argument checking for cpu_fprintf, gcc throws this warning: CC i386-softmmu/helper.o cc1: warnings being treated as errors /qemu/ar7/target-i386/helper.c: In function ‘cpu_x86_dump_seg_cache’: /qemu/ar7/target-i386/helper.c:220: error: format not a string literal and no format arguments The code is correct, but current gcc versions don't detect this. Therefore the patch rewrites the statement to satisfy the compiler. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-17Large page TLB flushPaul Brook
QEMU uses a fixed page size for the CPU TLB. If the guest uses large pages then we effectively split these into multiple smaller pages, and populate the corresponding TLB entries on demand. When the guest invalidates the TLB by virtual address we must invalidate all entries covered by the large page. However the address used to invalidate the entry may not be present in the QEMU TLB, so we do not know which regions to clear. Implementing a full vaiable size TLB is hard and slow, so just keep a simple address/mask pair to record which addresses may have been mapped by large pages. If the guest invalidates this region then flush the whole TLB. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-13x86/cpuid: move CPUID functions into separate fileAndre Przywara
about half of target-i386/helper.c consist of CPUID related functions. Only one of them is a real TCG helper function. So move the whole CPUID stuff out of this into a separate file to get better maintainable parts. This is only code reordering and should not affect QEMU's functionality. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-12Remove cpu_get_phys_page_debug from userspace emulationPaul Brook
cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-02-28target-i386: fix crash on x86 32bit linux host with hw breakpoint exceptionsJason Wessel
If you make use of hw breakpoints on a 32bit x86 linux host, qemu will segmentation fault when processing the exception. The problem is that the value of env is stored in $ebp in the op_helper raise_exception() function, and it can have the wrong value when calling it from non generated code. It is possible to work around the problem by restoring the value of env before calling raise_exception() using a new helper function that takes (CPUState *) as one of the arguments. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-23Fix OpenBSD linker warningBlue Swirl
helper.o(.text+0x11e0): In function `listflags': /src/qemu/target-i386/helper.c:661: warning: sprintf() is often misused, please use snprintf() Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-23Fix i386-bsd-user buildBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-22Add cpu model configuration support..john cooper
This is a reimplementation of prior versions which adds the ability to define cpu models for contemporary processors. The added models are likewise selected via -cpu <name>, and are intended to displace the existing convention of "-cpu qemu64" augmented with a series of feature flags. A primary motivation was determination of a least common denominator within a given processor class to simplify guest migration. It is still possible to modify an arbitrary model via additional feature flags however the goal here was to make doing so unnecessary in typical usage. The other consideration was providing models names reflective of current processors. Both AMD and Intel have reviewed the models in terms of balancing generality of migration vs. excessive feature downgrade relative to released silicon. This version of the patch replaces the prior hard wired definitions with a configuration file approach for new models. Existing models are thus far left as-is but may easily be transitioned to (or may be overridden by) the configuration file representation. Proposed new model definitions are provided here for current AMD and Intel processors. Each model consists of a name used to select it on the command line (-cpu <name>), and a model_id which corresponds to a least common denominator commercial instance of the processor class. A table of names/model_ids may be queried via "-cpu ?model": : x86 Opteron_G3 AMD Opteron 23xx (Gen 3 Class Opteron) x86 Opteron_G2 AMD Opteron 22xx (Gen 2 Class Opteron) x86 Opteron_G1 AMD Opteron 240 (Gen 1 Class Opteron) x86 Nehalem Intel Core i7 9xx (Nehalem Class Core i7) x86 Penryn Intel Core 2 Duo P9xxx (Penryn Class Core 2) x86 Conroe Intel Celeron_4x0 (Conroe/Merom Class Core 2) : Also added is "-cpu ?dump" which exhaustively outputs all config data for all defined models, and "-cpu ?cpuid" which enumerates all qemu recognized CPUID feature flags. The pseudo cpuid flag 'check' when added to the feature flag list will warn when feature flags (either implicit in a cpu model or explicit on the command line) would have otherwise been quietly unavailable to a guest: # qemu-system-x86_64 ... -cpu Nehalem,check warning: host cpuid 0000_0001 lacks requested flag 'sse4.2|sse4_2' [0x00100000] warning: host cpuid 0000_0001 lacks requested flag 'popcnt' [0x00800000] A similar 'enforce' pseudo flag exists which in addition to the above causes qemu to error exit if requested flags are unavailable. Configuration data for a cpu model resides in the target config file which by default will be installed as: /usr/local/etc/qemu/target-<arch>.conf The format of this file should be self explanatory given the definitions for the above six models and essentially mimics the structure of the static x86_def_t x86_defs. Encoding of cpuid flags names now allows aliases for both the configuration file and the command line which reconciles some Intel/AMD/Linux/Qemu naming differences. This patch was tested relative to qemu.git. Signed-off-by: john cooper <john.cooper@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-01-13Add KVM paravirt cpuid leafGleb Natapov
Initialize KVM paravirt cpuid leaf and allow user to control guest visible PV features through -cpu flag. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-01-11MCE: Fix bug of IA32_MCG_STATUS after system resetHuang Ying
Now, if we inject a fatal MCE into guest OS, for example Linux, Linux will go panic and then reboot. But if we inject another MCE now, system will reset directly instead of go panic firstly, because MCG_STATUS.MCIP is set to 1 and not cleared after reboot. This is does not follow the behavior in real hardware. This patch fixes this via set env->mcg_status to 0 during system reset. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-12-24Intel CPUs starting from pentium have apicGleb Natapov
Intel CPUs starting from pentium have apic. Lets advertise it. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-i386: Update CPUID feature set for TCGAndre Przywara
The CPUID features QEMU presented to the guest were not up-to-date with QEMU's emulated feature set. Add the missing bits of recent (and not so recent) additions to QEMU's emulation engine. For stability reasons only the user mode usable bits are exposed for now, features like Monitor or CR8LEG are left out. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-07cpuid: Fix multicore setup on IntelAndre Przywara
The multicore CPUID code detects whether the guest is an Intel or an AMD CPU, because the Linux kernel is picky about the CmpLegacy bit. KVM by default passes through the host's vendor, which was not catched by the code. So fork out the vendor determining bits into a separate function to be used from both places and always get the real vendor. This fixes KVM's multicore setup on Intel CPUs. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Reported-by: Dietmar Maurer <dietmar@proxmox.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-11-07user: move CPU reset call to main.c for x86/PPC/SparcBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-11-07v3: don't call reset functions on cpu initializationGlauber Costa
There is absolutely no need to call reset functions when initializing devices. Since we are already registering them, calling qemu_system_reset() should suffice. Actually, it is what happens when we reboot the machine, and using the same process instead of a special case semantics will even allow us to find bugs easier. Furthermore, the fact that we initialize things like the cpu quite early, leads to the need to introduce synchronization stuff like qemu_system_cond. This patch removes it entirely. All we need to do is call qemu_system_reset() only when we're already sure the system is up and running I tested it with qemu (with and without io-thread) and qemu-kvm, and it seems to be doing okay - although qemu-kvm uses a slightly different patch. [ v2: user mode still needs cpu_reset, so put it in ifdef. ] [ v3: leave qemu_system_cond for now. ] Signed-off-by: Glauber Costa <glommer@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-05x86: mce_banks always have the same sizeJuan Quintela
mce_banks is always MCE_BANKS_DEF * 4 in size, value never change CC: Huang Ying <ying.huang@intel.com> Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-05x86: make a20_mask int32_tJuan Quintela
This makes the savevm code correct, and sign extensins gives us exactly what we need (namely, sign extend to 64 bits when used with 64bit addresess. Once there, change 0x100000 for 1 << 20, that maks all a20 use the same syntax. Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-12i386: Drop redundant kvm_enabled testJan Kiszka
cpu_synchronize_state already does this. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-09-12Fix sys-queue.h conflict for goodBlue Swirl
Problem: Our file sys-queue.h is a copy of the BSD file, but there are some additions and it's not entirely compatible. Because of that, there have been conflicts with system headers on BSD systems. Some hacks have been introduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896, f40d753718c72693c5f520f0d9899f6e50395e94, 96555a96d724016e13190b28cffa3bc929ac60dc and 3990d09adf4463eca200ad964cc55643c33feb50 but the fixes were fragile. Solution: Avoid the conflict entirely by renaming the functions and the file. Revert the previous hacks. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-09-11kvm_arch_get_registers() shouldn't be called directlyGleb Natapov
Direct call to kvm_arch_get_registers() bypass logic in cpu_synchronize_state() Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-27introduce kvm64 CPUAndre Przywara
In addition to the TCG based qemu64 type let's introduce a kvm64 CPU type, which is the least common denominator of all KVM-capable x86-CPUs (based on Intel Pentium 4 Prescott). It can be used as a base type for migration. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-27allow overriding of CPUID level on command lineAndre Przywara
The CPUID level determines how many CPUID leafs are exposed to the guest. Some features (like multi-core) cannot be propagated without the proper level, but guests maybe confused by bogus entries in some leafs. So add level= and xlevel= to the list of -cpu options to allow the user to override the default settings. While at it, merge unnecessary local variables into one and allow hexadecimal arguments. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-27set CPUID bits to present cores and threads topologyAndre Przywara
Controlled by the enhanced -smp option set the CPUID bits to present the guest the desired topology. This is vendor specific, but (with the exception of the CMP_LEGACY bit) not conflicting, so we set all bits everytime. There is no real multithreading support for AMD CPUs, so report cores instead. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-27push CPUID level to 4 to allow Intel multicore decodingAndre Przywara
Intel CPUs store the number of cores in CPUID leaf 4. So push the maxleaf value to 4 to allow the guests access to this leaf. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-24Unbreak large mem support by removing kqemuAnthony Liguori
kqemu introduces a number of restrictions on the i386 target. The worst is that it prevents large memory from working in the default build. Furthermore, kqemu is fundamentally flawed in a number of ways. It relies on the TSC as a time source which will not be reliable on a multiple processor system in userspace. Since most modern processors are multicore, this severely limits the utility of kqemu. kvm is a viable alternative for people looking to accelerate qemu and has the benefit of being supported by the upstream Linux kernel. If someone can implement work arounds to remove the restrictions introduced by kqemu, I'm happy to avoid and/or revert this patch. N.B. kqemu will still function in the 0.11 series but this patch removes it from the 0.12 series. Paul, please Ack or Nack this patch. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16Only allow -cpu host when KVM is enabledAnthony Liguori
-cpu host is not at all useful when using tcg. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16Initialize cpuid variablesAnthony Liguori
This causes a build break when !KVM. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16omit 3DNOW! CPUID bits from qemu64 CPU modelAndre Przywara
Since we recently do not disable 3DNOW! support anymore, we should avoid setting the bits in the default qemu64 CPU model to ease migration. TCG does not support it anyway and even AMD deprecates it's usage nowadays. If you want to use it in KVM, use the phenom, athlon or host CPU model. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16gdbstub: x86: Support for setting segment registersJan Kiszka
This allows to set segment registers via gdb also in system emulation mode. Basic sanity checks are applied and nothing is changed if they fail. But screwing up the target via this interface will never be complicated, so I avoided being too paranoid here. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-09QEMU: MCE: Add MCE simulation to qemu/tcgHuang Ying
- MCE features are initialized when VCPU is intialized according to CPUID. - A monitor command "mce" is added to inject a MCE. - A new interrupt mask: CPU_INTERRUPT_MCE is added to inject the MCE. aliguori: fix build for linux-user Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-01Suppress a GCC warningBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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