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2008-05-04remove target ifdefs from vl.caurel32
(Glauber Costa) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4327 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-03CRIS: Convert divide step to TCG.edgar_igl
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4313 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-03CRIS: Convert lz (leading zeros) to TCG.edgar_igl
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4309 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-03CRIS: Eliminate a few unneeded moves to/from T0/T1.edgar_igl
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4306 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-03CRIS: Do post-increment without going via T0.edgar_igl
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4304 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-02CRIS updates:edgar_igl
* Support both the I and D MMUs and improve the accuracy of the MMU model. * Handle the automatic user/kernel stack pointer switching when leaving or entering user mode. * Move the CCS evaluation into helper funcs. * Make sure user-mode cannot change flags only writeable in kernel mode. * More conversion of the translator into TCG. * Handle exceptions while in a delayslot. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4299 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-28Factorize code in translate.caurel32
(Glauber Costa) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11Remove osdep.c/qemu-img code duplicationaurel32
(Kevin Wolf) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-25m68k mmap2 fixes.pbrook
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4106 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16More TCG conversions for CRIS.edgar_igl
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4071 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16Remove unused members.edgar_igl
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4070 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-15More TCG conversions for CRIS.edgar_igl
* Bit swap insn (bitwise not, endian swap and bit reverse). * Muls and mulu. * Extended arithmetics. * Parts of the condition code handling. * Use tcg_const_tl. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4069 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-15Simplified some dead extended arith code after search and replace.edgar_igl
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4066 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14A first small step to convert the CRIS translator to TCG.edgar_igl
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4057 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14Model more parts of the ETRAX mmu (still alot missing).edgar_igl
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4056 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14* Add a model of the ETRAX interrupt controller.edgar_igl
* Clean up the interrupt handling a bit. * Connect some NOR flash to the test board. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4055 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-01* target-cris/op.c: Make sure the bit-test insn only updates the XNZ flags.edgar_igl
* target-cris/helper.c: Update ERP for user-mode simulation aswell. * hw/etraxfs_timer.c: Support multiple timers. * hw/etraxfs_ser.c: Multiple ports, the data just goes to stdout. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4004 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-28Cut the translation block after translating a break insn. This avoids an ↵edgar_igl
issue where QEMU finds an illegal CRIS insn while the guest is returning through a signal return trampoline. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3997 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-28More consistent naming for CRIS register-number macros.edgar_igl
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3996 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-25Silently ignore CRIS cache flushes, instead of aborting due to unknown insn.edgar_igl
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3990 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01use the TCG code generatorbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-01-14Optimize clear insns by treating support reg P0 specially andbalrog
add missing micro-op RETURN's (Edgar E. Iglesias). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3913 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11fixed invalid typebellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3582 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10added cpu_model parameter to cpu_init()bellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29Adjust s390 addresses (the MSB is defined as "to be ignored").ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-28Use the shiny new clz helpers.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3464 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer
allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08CRIS MMU emulation, by Edgar E. Iglesias.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3362 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08The remainder of CRIS CPU emulation files, by Edgar E. Iglesias.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3361 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08CRIS micro-ops, by Edgar E. Iglesias.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3360 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08CRIS insn decoding macros, by Edgar E. Iglesias.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3359 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08CRIS instruction translation, by Edgar E. Iglesias.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3358 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08CRIS disassembler, originally from binutils, by Edgar E. Iglesias.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3356 c046a42c-6fe2-441c-8c8c-71466251a162