Age | Commit message (Expand) | Author |
2012-09-15 | target-cris: Switch to AREG0 free mode | Aurelien Jarno |
2012-09-15 | target-cris: Avoid AREG0 for helpers | Aurelien Jarno |
2012-06-14 | cris: Add break support for v10. | Edgar E. Iglesias |
2012-03-14 | target-cris: Don't overuse CPUState | Andreas Färber |
2011-12-12 | cris: Handle conditional stores on CRISv10 | Stefan Sandstrom |
2011-06-28 | cris: Handle opcode zero | Edgar E. Iglesias |
2011-05-08 | Fix typo in comment (truely -> truly) | Stefan Weil |
2011-01-10 | cris: Allow more TB chaining for crisv10 | Edgar E. Iglesias |
2010-10-13 | cris: avoid a write only variable | Blue Swirl |
2010-03-18 | Replace assert(0) with abort() or cpu_abort() | Blue Swirl |
2010-03-07 | Update to a hopefully more future proof FSF address | Blue Swirl |
2010-02-20 | cris: Mask interrupts on dslots for CRISv10. | Edgar E. Iglesias |
2010-02-15 | crisv10: Prettify. | Edgar E. Iglesias |
2010-02-15 | cris: Add support for CRISv10 translation. | Edgar E. Iglesias |