| Age | Commit message (Expand) | Author |
|---|---|---|
| 2008-09-05 | CRIS: Mask off the cache selection bit after MMU translations. | edgar_igl |
| 2008-09-03 | CRIS: Remove redundant code. | edgar_igl |
| 2008-06-09 | CRIS: Emulate NMIs. | edgar_igl |
| 2008-05-27 | CRIS: Restructure the translator to allow for better code generation. | edgar_igl |
| 2008-05-13 | CRIS: Improve TLB management and handle delayslots at page boundaries. | edgar_igl |
| 2008-05-06 | CRIS MMU Updates | edgar_igl |
| 2008-05-02 | CRIS updates: | edgar_igl |
| 2008-03-14 | * Add a model of the ETRAX interrupt controller. | edgar_igl |
| 2008-03-01 | * target-cris/op.c: Make sure the bit-test insn only updates the XNZ flags. | edgar_igl |
| 2008-02-28 | More consistent naming for CRIS register-number macros. | edgar_igl |
| 2007-10-28 | Use the shiny new clz helpers. | ths |
| 2007-10-14 | Replace is_user variable with mmu_idx in softmmu core, | j_mayer |
| 2007-10-08 | The remainder of CRIS CPU emulation files, by Edgar E. Iglesias. | ths |
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