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AgeCommit message (Expand)Author
2014-04-17target-arm: Implement AArch64 EL1 exception handlingRob Herring
2014-04-17target-arm: Move arm_log_exception() into internals.hPeter Maydell
2014-04-17target-arm: Implement AArch64 SPSR_EL1Peter Maydell
2014-04-17target-arm: Implement SP_EL0, SP_EL1Peter Maydell
2014-04-17target-arm: Add AArch64 ELR_EL1 register.Peter Maydell
2014-04-17target-arm: Implement AArch64 views of fault status and data registersRob Herring
2014-04-17target-arm: Use dedicated CPU state fields for ARM946 access bit registersPeter Maydell
2014-04-17target-arm: A64: Implement DC ZVAPeter Maydell
2014-04-17target-arm: Don't mention PMU in debug feature registerPeter Maydell
2014-04-17target-arm: Add v8 mmu translation supportRob Herring
2014-04-17target-arm: Fix VFP enables for AArch32 EL0 under AArch64 EL1Peter Maydell
2014-04-17target-arm: A64: Add assertion that FP access was checkedPeter Maydell
2014-04-17target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN setPeter Maydell
2014-04-17target-arm: Provide syndrome information for MMU faultsRob Herring
2014-04-17target-arm: Add support for generating exceptions with syndrome informationPeter Maydell
2014-04-17target-arm: Provide correct syndrome information for cpreg access trapsPeter Maydell
2014-04-17target-arm: Define exception record for AArch64 exceptionsPeter Maydell
2014-04-17target-arm: Implement AArch64 DAIF system registerPeter Maydell
2014-04-17target-arm: Split out private-to-target functions into internals.hPeter Maydell
2014-03-27target-arm: Add missing 'static' attributeStefan Weil
2014-03-24target-arm: Fix A64 Neon MLSPeter Maydell
2014-03-18target-arm: A64: Add saturating accumulate ops (USQADD/SUQADD)Alex Bennée
2014-03-18target-arm: A64: Add saturating int ops (SQNEG/SQABS)Alex Bennée
2014-03-17target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)Alex Bennée
2014-03-17target-arm: A64: Implement FCVTXNPeter Maydell
2014-03-17target-arm: A64: Implement scalar saturating narrow opsAlex Bennée
2014-03-17target-arm: A64: Move handle_2misc_narrow functionAlex Bennée
2014-03-17target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPEAlex Bennée
2014-03-17target-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categoriesPeter Maydell
2014-03-17target-arm: A64: Handle saturating left shifts SQSHL, SQSHLU, UQSHLPeter Maydell
2014-03-17target-arm: A64: Implement FRINT*Peter Maydell
2014-03-17target-arm: A64: Implement SRIPeter Maydell
2014-03-17target-arm: A64: Add FRECPX (reciprocal exponent)Alex Bennée
2014-03-17target-arm: A64: List unsupported shift-imm opcodesPeter Maydell
2014-03-17target-arm: A64: Implement FCVTLPeter Maydell
2014-03-17target-arm: A64: Implement FCVTNPeter Maydell
2014-03-17target-arm: A64: Implement FCVT[NMAPZ][SU] SIMD instructionsPeter Maydell
2014-03-17target-arm: A64: Implement SHLL, SHLL2Peter Maydell
2014-03-17target-arm: A64: Implement SADDLP, UADDLP, SADALP, UADALPPeter Maydell
2014-03-17target-arm: A64: Saturating and narrowing shift opsAlex Bennée
2014-03-17target-arm: A64: Add remaining CLS/Z vector opsAlex Bennée
2014-03-17target-arm: A64: Add FSQRT to C3.6.17 (two misc)Alex Bennée
2014-03-17target-arm: A64: Add last AdvSIMD Integer to FP opsAlex Bennée
2014-03-17target-arm: A64: Fix bug in add_sub_ext handling of rnAlex Bennée
2014-03-17target-arm: A64: Implement PMULL instructionPeter Maydell
2014-03-17target-arm: Add ARM_CP_IO notation to PMCR reginfoPeter Maydell
2014-03-15misc: Fix typos in commentsStefan Weil
2014-03-13cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber
2014-03-13cputlb: Change tlb_flush() argument to CPUStateAndreas Färber
2014-03-13cputlb: Change tlb_flush_page() argument to CPUStateAndreas Färber
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