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AgeCommit message (Expand)Author
2014-08-19target-arm: Correctly handle PSTATE.SS when taking exception to AArch32Peter Maydell
2014-08-19target-arm: Don't allow AArch32 to access RES0 CPSR bitsPeter Maydell
2014-08-19target-arm: Adjust debug ID registers per-CPUPeter Maydell
2014-08-19target-arm: Provide both 32 and 64 bit versions of debug registersPeter Maydell
2014-08-19target-arm: Allow STATE_BOTH reginfo descriptions for more than cp14Peter Maydell
2014-08-19target-arm: Collect up the debug cp register definitionsPeter Maydell
2014-08-19target-arm: Fix return address for A64 BRK instructionsPeter Maydell
2014-08-12trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova
2014-08-04target-arm: A64: fix TLB flush instructionsAlex Bennée
2014-08-04target-arm: don't hardcode mask values in arm_cpu_handle_mmu_faultAlex Bennée
2014-08-04target-arm: Fix bit test in sp_el0_accessStefan Weil
2014-08-04target-arm: Add FAR_EL2 and 3Edgar E. Iglesias
2014-08-04target-arm: Add ESR_EL2 and 3Edgar E. Iglesias
2014-08-04target-arm: Make far_el1 an arrayEdgar E. Iglesias
2014-08-04target-arm: A64: Respect SPSEL when taking exceptionsEdgar E. Iglesias
2014-08-04target-arm: A64: Respect SPSEL in ERET SP restoreEdgar E. Iglesias
2014-08-04target-arm: A64: Break out aarch64_save/restore_spEdgar E. Iglesias
2014-07-08target-arm: Implement vCPU reset via KVM_ARM_VCPU_INIT for 32-bit CPUsPeter Maydell
2014-06-24Fix new typos (found by codespell)Stefan Weil
2014-06-19target-arm: Introduce per-CPU field for PSCI versionPranavkumar Sawargaonkar
2014-06-19target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64Pranavkumar Sawargaonkar
2014-06-19target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possiblePranavkumar Sawargaonkar
2014-06-19target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64Pranavkumar Sawargaonkar
2014-06-19target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv()Peter Maydell
2014-06-19target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int()Peter Maydell
2014-06-19target-arm: Add ULL suffix to calculation of page sizePeter Maydell
2014-06-19target-arm: implement PD0/PD1 bits for TTBCRFabian Aggeler
2014-06-16target-arm: Use Common Tables in AES InstructionsTom Musta
2014-06-09target-arm: Delete unused iwmmxt_msadb helperPeter Maydell
2014-06-09target-arm: Fix errors in writes to generic timer control registersPeter Maydell
2014-06-09target-arm: A64: Implement two-register SHA instructionsPeter Maydell
2014-06-09target-arm: A64: Implement 3-register SHA instructionsPeter Maydell
2014-06-09target-arm: A64: Implement AES instructionsPeter Maydell
2014-06-09target-arm: A32/T32: Mask CRC value in calling code, not helperPeter Maydell
2014-06-09target-arm: A64: Implement CRC instructionsPeter Maydell
2014-06-09target-arm: VFPv4 implies half-precision extensionPeter Maydell
2014-06-09target-arm: Clean up handling of ARMv8 optional feature bitsPeter Maydell
2014-06-09target-arm: Remove unnecessary setting of feature bitsPeter Maydell
2014-06-09target-arm: arm_any_initfn() should never set ARM_FEATURE_AARCH64Peter Maydell
2014-06-09target-arm: A64: Use PMULL feature bit for PMULLPeter Maydell
2014-06-09target-arm: add support for v8 VMULL.P64 instructionPeter Maydell
2014-06-09target-arm: Allow 3reg_wide undefreq to encode more bad size optionsPeter Maydell
2014-06-09target-arm: add support for v8 SHA1 and SHA256 instructionsArd Biesheuvel
2014-06-09target-arm: Correct handling of UXN bit in ARMv8 LPAE page tablesIan Campbell
2014-06-09target-arm: Prepare cpreg writefns/readfns for EL3/SecExtFabian Aggeler
2014-06-09target-arm/cpu64.c: Actually register Cortex-A57 impdef registersPeter Maydell
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini
2014-06-05target-arm: move arm_*_code to a separate filePaolo Bonzini
2014-06-05softmmu: commonize helper definitionsPaolo Bonzini
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson
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