Age | Commit message (Expand) | Author |
2016-03-16 | target-arm: Fix translation level on early translation faults | Sergey Sorokin |
2016-03-16 | target-arm: Implement MRS (banked) and MSR (banked) instructions | Peter Maydell |
2016-03-04 | target-arm: Only trap SRS from S-EL1 if specified mode is MON | Ralf-Philipp Weinmann |
2016-03-04 | target-arm: implement BE32 mode in system emulation | Paolo Bonzini |
2016-03-04 | target-arm: implement setend | Paolo Bonzini |
2016-03-04 | target-arm: introduce tbflag for endianness | Peter Crosthwaite |
2016-03-04 | target-arm: a64: Add endianness support | Peter Crosthwaite |
2016-03-04 | target-arm: introduce disas flag for endianness | Paolo Bonzini |
2016-03-04 | target-arm: pass DisasContext to gen_aa32_ld*/st* | Paolo Bonzini |
2016-03-04 | target-arm: implement SCTLR.EE | Peter Crosthwaite |
2016-03-04 | linux-user: arm: handle CPSR.E correctly in strex emulation | Paolo Bonzini |
2016-03-04 | arm: cpu: handle BE32 user-mode as BE | Peter Crosthwaite |
2016-03-04 | target-arm: cpu: Move cpu_is_big_endian to header | Peter Crosthwaite |
2016-03-04 | target-arm: implement SCTLR.B, drop bswap_code | Paolo Bonzini |
2016-03-04 | target-arm: Correct handling of writes to CPSR mode bits from gdb in usermode | Peter Maydell |
2016-03-01 | tcg: Add type for vCPU pointers | LluĂs Vilanova |
2016-02-26 | target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF | Peter Maydell |
2016-02-26 | target-arm: Mark CNTHP_TVAL_EL2 as ARM_CP_NO_RAW | Edgar E. Iglesias |
2016-02-26 | target-arm: Implement MDCR_EL3.TPM and MDCR_EL2.TPM traps | Peter Maydell |
2016-02-26 | target-arm: Fix handling of SDCR for 32-bit code | Peter Maydell |
2016-02-26 | target-arm: Make Monitor->NS PL1 mode changes illegal if HCR.TGE is 1 | Peter Maydell |
2016-02-26 | target-arm: Make mode switches from Hyp via CPS and MRS illegal | Peter Maydell |
2016-02-26 | target-arm: In v8, make illegal AArch32 mode changes set PSTATE.IL | Peter Maydell |
2016-02-26 | target-arm: Forbid mode switch to Mon from Secure EL1 | Peter Maydell |
2016-02-26 | target-arm: Add Hyp mode checks to bad_mode_switch() | Peter Maydell |
2016-02-26 | target-arm: Add comment about not implementing NSACR.RFR | Peter Maydell |
2016-02-26 | target-arm: In cpsr_write() ignore mode switches from User mode | Peter Maydell |
2016-02-26 | target-arm: Raw CPSR writes should skip checks and bank switching | Peter Maydell |
2016-02-26 | target-arm: Add write_type argument to cpsr_write() | Peter Maydell |
2016-02-26 | target-arm: Give CPSR setting on 32-bit exception return its own helper | Peter Maydell |
2016-02-23 | all: Clean up includes | Peter Maydell |
2016-02-18 | target-arm: Add PMUSERENR_EL0 register | Alistair Francis |
2016-02-18 | target-arm: Add the pmovsclr_el0 and pmintenclr_el1 registers | Alistair Francis |
2016-02-18 | target-arm: Add the pmceid0 and pmceid1 registers | Alistair Francis |
2016-02-18 | target-arm: UNDEF in the UNPREDICTABLE SRS-from-System case | Peter Maydell |
2016-02-18 | target-arm: Combine user-only and softmmu get/set_r13_banked() | Peter Maydell |
2016-02-18 | target-arm: Move bank_number() into internals.h | Peter Maydell |
2016-02-18 | target-arm: Move get/set_r13_banked() to op_helper.c | Peter Maydell |
2016-02-18 | target-arm: Clean up trap/undef handling of SRS | Peter Maydell |
2016-02-18 | target-arm: Report correct syndrome for FPEXC32_EL2 traps | Peter Maydell |
2016-02-18 | target-arm: Implement MDCR_EL3.TDA and MDCR_EL2.TDA traps | Peter Maydell |
2016-02-18 | target-arm: Implement MDCR_EL2.TDRA traps | Peter Maydell |
2016-02-18 | target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA traps | Peter Maydell |
2016-02-18 | target-arm: Fix handling of SCR.SMD | Peter Maydell |
2016-02-18 | target-arm: correct CNTFRQ access rights | Peter Maydell |
2016-02-11 | target-arm: Implement checking of fired watchpoint | Sergey Fedorov |
2016-02-11 | target-arm: Fix IL bit reported for Thumb VFP and Neon traps | Peter Maydell |
2016-02-11 | target-arm: Fix IL bit reported for Thumb coprocessor traps | Peter Maydell |
2016-02-11 | target-arm: Correct misleading 'is_thumb' syn_* parameter names | Peter Maydell |
2016-02-11 | target-arm: Enable EL3 for Cortex-A53 and Cortex-A57 | Peter Maydell |