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AgeCommit message (Expand)Author
2014-09-10target-arm: Correct Cortex-A57 ISAR5 and AA64ISAR0 ID register valuesPeter Maydell
2014-09-10target-arm: Fix regression that disabled VFP for ARMv5 CPUsPeter Maydell
2014-09-08arm/virt: Use PSCI v0.2 function IDs in the DT when KVM uses PSCI v0.2Christoffer Dall
2014-09-08target-arm: Rename QEMU PSCI v0.1 definitionsChristoffer Dall
2014-09-08target-arm: Fix return address for A64 BRK instructionsPeter Maydell
2014-07-08target-arm: Implement vCPU reset via KVM_ARM_VCPU_INIT for 32-bit CPUsPeter Maydell
2014-06-24Fix new typos (found by codespell)Stefan Weil
2014-06-19target-arm: Introduce per-CPU field for PSCI versionPranavkumar Sawargaonkar
2014-06-19target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64Pranavkumar Sawargaonkar
2014-06-19target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possiblePranavkumar Sawargaonkar
2014-06-19target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64Pranavkumar Sawargaonkar
2014-06-19target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv()Peter Maydell
2014-06-19target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int()Peter Maydell
2014-06-19target-arm: Add ULL suffix to calculation of page sizePeter Maydell
2014-06-19target-arm: implement PD0/PD1 bits for TTBCRFabian Aggeler
2014-06-16target-arm: Use Common Tables in AES InstructionsTom Musta
2014-06-09target-arm: Delete unused iwmmxt_msadb helperPeter Maydell
2014-06-09target-arm: Fix errors in writes to generic timer control registersPeter Maydell
2014-06-09target-arm: A64: Implement two-register SHA instructionsPeter Maydell
2014-06-09target-arm: A64: Implement 3-register SHA instructionsPeter Maydell
2014-06-09target-arm: A64: Implement AES instructionsPeter Maydell
2014-06-09target-arm: A32/T32: Mask CRC value in calling code, not helperPeter Maydell
2014-06-09target-arm: A64: Implement CRC instructionsPeter Maydell
2014-06-09target-arm: VFPv4 implies half-precision extensionPeter Maydell
2014-06-09target-arm: Clean up handling of ARMv8 optional feature bitsPeter Maydell
2014-06-09target-arm: Remove unnecessary setting of feature bitsPeter Maydell
2014-06-09target-arm: arm_any_initfn() should never set ARM_FEATURE_AARCH64Peter Maydell
2014-06-09target-arm: A64: Use PMULL feature bit for PMULLPeter Maydell
2014-06-09target-arm: add support for v8 VMULL.P64 instructionPeter Maydell
2014-06-09target-arm: Allow 3reg_wide undefreq to encode more bad size optionsPeter Maydell
2014-06-09target-arm: add support for v8 SHA1 and SHA256 instructionsArd Biesheuvel
2014-06-09target-arm: Correct handling of UXN bit in ARMv8 LPAE page tablesIan Campbell
2014-06-09target-arm: Prepare cpreg writefns/readfns for EL3/SecExtFabian Aggeler
2014-06-09target-arm/cpu64.c: Actually register Cortex-A57 impdef registersPeter Maydell
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini
2014-06-05target-arm: move arm_*_code to a separate filePaolo Bonzini
2014-06-05softmmu: commonize helper definitionsPaolo Bonzini
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson
2014-05-27target-arm: A64: Register VBAR_EL3Edgar E. Iglesias
2014-05-27target-arm: A64: Register VBAR_EL2Edgar E. Iglesias
2014-05-27target-arm: Make vbar_write writeback to any CPREGEdgar E. Iglesias
2014-05-27target-arm: A64: Generalize update_spsel for the various ELsEdgar E. Iglesias
2014-05-27target-arm: A64: Generalize ERET to various ELsEdgar E. Iglesias
2014-05-27target-arm: A64: Trap ERET from EL0 at translation timeEdgar E. Iglesias
2014-05-27target-arm: A64: Forbid ERET to higher or unimplemented ELsEdgar E. Iglesias
2014-05-27target-arm: Register EL3 versions of ELR and SPSREdgar E. Iglesias
2014-05-27target-arm: Register EL2 versions of ELR and SPSREdgar E. Iglesias
2014-05-27target-arm: Add a feature flag for EL3Edgar E. Iglesias
2014-05-27target-arm: Add a feature flag for EL2Edgar E. Iglesias
2014-05-27target-arm: A64: Introduce aarch64_banked_spsr_index()Edgar E. Iglesias
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