Age | Commit message (Expand) | Author |
2012-12-19 | fpu: move public header file to include/fpu | Paolo Bonzini |
2012-12-19 | softmmu: move include files to include/sysemu/ | Paolo Bonzini |
2012-12-19 | misc: move include files to include/qemu/ | Paolo Bonzini |
2012-12-19 | qom: move include files to include/qom/ | Paolo Bonzini |
2012-12-19 | exec: move include files to include/exec/ | Paolo Bonzini |
2012-12-19 | build: kill libdis, move disassemblers to disas/ | Paolo Bonzini |
2012-12-16 | exec: refactor cpu_restore_state | Blue Swirl |
2012-12-08 | TCG: Use gen_opc_instr_start from context instead of global variable. | Evgeny Voevodin |
2012-12-08 | TCG: Use gen_opc_icount from context instead of global variable. | Evgeny Voevodin |
2012-12-08 | TCG: Use gen_opc_pc from context instead of global variable. | Evgeny Voevodin |
2012-11-17 | TCG: Use gen_opc_buf from context instead of global variable. | Evgeny Voevodin |
2012-11-17 | TCG: Use gen_opc_ptr from context instead of global variable. | Evgeny Voevodin |
2012-11-10 | disas: avoid using cpu_single_env | Blue Swirl |
2012-10-31 | cpus: Pass CPUState to [qemu_]cpu_has_work() | Andreas Färber |
2012-10-28 | target-arm: rename helper flags | Aurelien Jarno |
2012-10-24 | target-arm: Remove out of date FIXME regarding saturating arithmetic | Peter Maydell |
2012-10-24 | target-arm: Implement abs_i32 inline rather than as a helper | Peter Maydell |
2012-10-24 | target-arm: Use TCG operation for Neon 64 bit negation | Peter Maydell |
2012-10-24 | arm-semi.c: Handle get/put_user() failure accessing arguments | Peter Maydell |
2012-10-23 | Rename target_phys_addr_t to hwaddr | Avi Kivity |
2012-10-19 | target-arm/neon_helper: Remove obsolete FIXME comment | Peter Maydell |
2012-10-17 | target-arm/translate: Fix RRX operands | Peter Crosthwaite |
2012-10-05 | target-arm: Drop unused DECODE_CPREG_CRN macro | Peter Maydell |
2012-10-05 | target-arm: use deposit instead of hardcoded version | Aurelien Jarno |
2012-10-05 | target-arm: mark a few integer helpers const and pure | Aurelien Jarno |
2012-10-05 | target-arm: convert sar, shl and shr helpers to TCG | Aurelien Jarno |
2012-10-05 | target-arm: convert add_cc and sub_cc helpers to TCG | Aurelien Jarno |
2012-10-05 | target-arm: use globals for CC flags | Aurelien Jarno |
2012-10-05 | target-arm: Reinstate display of VFP registers in cpu_dump_state | Peter Maydell |
2012-09-27 | Emit debug_insn for CPU_LOG_TB_OP_OPT as well. | Richard Henderson |
2012-09-15 | target-arm: final conversion to AREG0 free mode | Blue Swirl |
2012-09-15 | target-arm: convert remaining helpers | Blue Swirl |
2012-09-15 | target-arm: convert void helpers | Blue Swirl |
2012-09-10 | target-arm: Fix potential buffer overflow | Stefan Weil |
2012-08-22 | arm-semi: don't leak 1KB user string lock buffer upon TARGET_SYS_OPEN | Jim Meyering |
2012-08-10 | target-arm: Fix typos in comments | Peter Maydell |
2012-08-10 | arm: translate: comment typo - s/middel/middle/ | Peter A. G. Crosthwaite |
2012-07-12 | target-arm: Add support for long format translation table walks | Peter Maydell |
2012-07-12 | target-arm: Implement TTBCR changes for LPAE | Peter Maydell |
2012-07-12 | target-arm: Implement long-descriptor PAR format | Peter Maydell |
2012-07-12 | target-arm: Use target_phys_addr_t in get_phys_addr() | Peter Maydell |
2012-07-12 | target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAE | Peter Maydell |
2012-07-12 | target-arm: Add 64 bit variants of DBGDRAR and DBGDSAR for LPAE | Peter Maydell |
2012-07-12 | target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registers | Peter Maydell |
2012-07-12 | target-arm: Extend feature flags to 64 bits | Peter Maydell |
2012-07-12 | target-arm: Implement privileged-execute-never (PXN) | Peter Maydell |
2012-07-12 | ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bits | Peter Maydell |
2012-07-12 | target-arm: Fix TCG temp handling in 64 bit cp writes | Peter Maydell |
2012-07-12 | target-arm: Fix some copy-and-paste errors in cp register names | Peter Maydell |
2012-07-12 | target-arm: Fix typo that meant TTBR1 accesses went to TTBR0 | Peter Maydell |