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QEMU is a generic and open source machine & userspace emulator and virtualizer
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target-arm
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Author
2016-07-21
kvm-irqchip: i386: add hook for add/remove virq
Peter Xu
2016-07-14
target-arm: Add missed AArch32 TLBI sytem registers
Sergey Sorokin
2016-07-12
target-*: Clean up cpu.h header guards
Markus Armbruster
2016-07-12
Use #include "..." for our own headers, <...> for others
Markus Armbruster
2016-07-12
Fix confusing argument names in some common functions
Sergey Sorokin
2016-07-07
target-arm/arm-semi.c: In SYS_HEAPINFO use correct type for 'limit'
Peter Maydell
2016-07-04
target-arm/arm-semi.c: Fix SYS_HEAPINFO for 64-bit guests
Peter Maydell
2016-06-29
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
Peter Maydell
2016-06-29
target-*: Don't redefine cpu_exec()
Peter Crosthwaite
2016-06-24
softfloat: Implement run-time-configurable meaning of signaling NaN bit
Aleksandar Markovic
2016-06-20
exec: [tcg] Track which vCPU is performing translation and execution
LluĂs Vilanova
2016-06-17
target-arm/monitor.c: Advertise emulated GICv3 in capabilities
Peter Maydell
2016-06-17
target-arm/machine.c: Allow user to request GICv3 emulation
Peter Maydell
2016-06-17
target-arm: Add mp-affinity property for ARM CPU class
Pavel Fedin
2016-06-17
target-arm: Provide hook to tell GICv3 about changes of security state
Peter Maydell
2016-06-17
target-arm: Define new arm_is_el3_or_mon() function
Peter Maydell
2016-06-16
os-posix: include sys/mman.h
Paolo Bonzini
2016-06-14
target-arm: Don't permit ARMv8-only Neon insns on ARMv7
Peter Maydell
2016-06-14
target-arm: Fix reset and migration of TTBCR(S)
Peter Maydell
2016-06-14
hw/arm/virt: Add PMU node for virt machine
Shannon Zhao
2016-06-14
target-arm: kvm64: set guest PMUv3 feature bit if supported
Shannon Zhao
2016-06-07
virtio: move bi-endian target support to a single location
Greg Kurz
2016-06-06
target-arm: Fix TTBR selecting logic on AArch32 Stage 2 translation
Sergey Sorokin
2016-06-06
target-arm: Don't try to set ESR IL bit in arm_cpu_do_interrupt_aarch64()
Peter Maydell
2016-06-06
target-arm: Set IL bit in syndromes for insn abort, watchpoint, swstep
Peter Maydell
2016-06-06
target-arm: A64: Create Instruction Syndromes for Data Aborts
Edgar E. Iglesias
2016-06-06
target-arm: Add the HSTR_EL2 register
Alistair Francis
2016-05-19
cpu: move exec-all.h inclusion out of cpu.h
Paolo Bonzini
2016-05-19
hw: explicitly include qemu/log.h
Paolo Bonzini
2016-05-19
arm: move arm_log_exception into .c file
Paolo Bonzini
2016-05-19
qemu-common: push cpu.h inclusion out of qemu-common.h
Paolo Bonzini
2016-05-19
hw: move CPU state serialization to migration/cpu.h
Paolo Bonzini
2016-05-19
target-arm: make cpu-qom.h not target specific
Paolo Bonzini
2016-05-19
cpu: make cpu-qom.h only include-able from cpu.h
Paolo Bonzini
2016-05-12
tcg: Allow goto_tb to any target PC in user mode
Sergey Fedorov
2016-05-12
tcg: Clean up direct block chaining safety checks
Sergey Fedorov
2016-05-12
tb: consistently use uint32_t for tb->flags
Emilio G. Cota
2016-05-12
target-arm: Avoid unnecessary TLB flush on TCR_EL2, TCR_EL3 writes
Peter Maydell
2016-05-12
ARM: Factor out ARM on/off PSCI control functions
Jean-Christophe DUBOIS
2016-05-12
target-arm/translate-a64.c: Unify some of the ldst_reg decoding
Edgar E. Iglesias
2016-05-12
target-arm/translate-a64.c: Use extract32 in disas_ldst_reg_imm9
Edgar E. Iglesias
2016-05-12
target-arm: Split data abort syndrome generator
Peter Maydell
2016-05-12
target-arm: Fix descriptor address masking in ARM address translation
Sergey Sorokin
2016-05-12
target-arm: Stage 2 permission fault was fixed in AArch32 state
Sergey Sorokin
2016-04-04
target-arm: Make the 64-bit version of VTCR do the migration
Peter Maydell
2016-04-04
target-arm: Remove incorrect ALIAS tags from ESR_EL2 and ESR_EL3
Peter Maydell
2016-04-04
target-arm: Correctly reset SCTLR_EL3 for 64-bit CPUs
Peter Maydell
2016-03-30
arm: implement query-gic-capabilities
Peter Xu
2016-03-30
arm: enhance kvm_arm_create_scratch_host_vcpu
Peter Xu
2016-03-30
arm: qmp: add query-gic-capabilities interface
Peter Xu
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