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AgeCommit message (Expand)Author
2016-03-16target-arm: Fix translation level on early translation faultsSergey Sorokin
2016-03-16target-arm: Implement MRS (banked) and MSR (banked) instructionsPeter Maydell
2016-03-04target-arm: Only trap SRS from S-EL1 if specified mode is MONRalf-Philipp Weinmann
2016-03-04target-arm: implement BE32 mode in system emulationPaolo Bonzini
2016-03-04target-arm: implement setendPaolo Bonzini
2016-03-04target-arm: introduce tbflag for endiannessPeter Crosthwaite
2016-03-04target-arm: a64: Add endianness supportPeter Crosthwaite
2016-03-04target-arm: introduce disas flag for endiannessPaolo Bonzini
2016-03-04target-arm: pass DisasContext to gen_aa32_ld*/st*Paolo Bonzini
2016-03-04target-arm: implement SCTLR.EEPeter Crosthwaite
2016-03-04linux-user: arm: handle CPSR.E correctly in strex emulationPaolo Bonzini
2016-03-04arm: cpu: handle BE32 user-mode as BEPeter Crosthwaite
2016-03-04target-arm: cpu: Move cpu_is_big_endian to headerPeter Crosthwaite
2016-03-04target-arm: implement SCTLR.B, drop bswap_codePaolo Bonzini
2016-03-04target-arm: Correct handling of writes to CPSR mode bits from gdb in usermodePeter Maydell
2016-03-01tcg: Add type for vCPU pointersLluís Vilanova
2016-02-26target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEFPeter Maydell
2016-02-26target-arm: Mark CNTHP_TVAL_EL2 as ARM_CP_NO_RAWEdgar E. Iglesias
2016-02-26target-arm: Implement MDCR_EL3.TPM and MDCR_EL2.TPM trapsPeter Maydell
2016-02-26target-arm: Fix handling of SDCR for 32-bit codePeter Maydell
2016-02-26target-arm: Make Monitor->NS PL1 mode changes illegal if HCR.TGE is 1Peter Maydell
2016-02-26target-arm: Make mode switches from Hyp via CPS and MRS illegalPeter Maydell
2016-02-26target-arm: In v8, make illegal AArch32 mode changes set PSTATE.ILPeter Maydell
2016-02-26target-arm: Forbid mode switch to Mon from Secure EL1Peter Maydell
2016-02-26target-arm: Add Hyp mode checks to bad_mode_switch()Peter Maydell
2016-02-26target-arm: Add comment about not implementing NSACR.RFRPeter Maydell
2016-02-26target-arm: In cpsr_write() ignore mode switches from User modePeter Maydell
2016-02-26target-arm: Raw CPSR writes should skip checks and bank switchingPeter Maydell
2016-02-26target-arm: Add write_type argument to cpsr_write()Peter Maydell
2016-02-26target-arm: Give CPSR setting on 32-bit exception return its own helperPeter Maydell
2016-02-23all: Clean up includesPeter Maydell
2016-02-18target-arm: Add PMUSERENR_EL0 registerAlistair Francis
2016-02-18target-arm: Add the pmovsclr_el0 and pmintenclr_el1 registersAlistair Francis
2016-02-18target-arm: Add the pmceid0 and pmceid1 registersAlistair Francis
2016-02-18target-arm: UNDEF in the UNPREDICTABLE SRS-from-System casePeter Maydell
2016-02-18target-arm: Combine user-only and softmmu get/set_r13_banked()Peter Maydell
2016-02-18target-arm: Move bank_number() into internals.hPeter Maydell
2016-02-18target-arm: Move get/set_r13_banked() to op_helper.cPeter Maydell
2016-02-18target-arm: Clean up trap/undef handling of SRSPeter Maydell
2016-02-18target-arm: Report correct syndrome for FPEXC32_EL2 trapsPeter Maydell
2016-02-18target-arm: Implement MDCR_EL3.TDA and MDCR_EL2.TDA trapsPeter Maydell
2016-02-18target-arm: Implement MDCR_EL2.TDRA trapsPeter Maydell
2016-02-18target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA trapsPeter Maydell
2016-02-18target-arm: Fix handling of SCR.SMDPeter Maydell
2016-02-18target-arm: correct CNTFRQ access rightsPeter Maydell
2016-02-11target-arm: Implement checking of fired watchpointSergey Fedorov
2016-02-11target-arm: Fix IL bit reported for Thumb VFP and Neon trapsPeter Maydell
2016-02-11target-arm: Fix IL bit reported for Thumb coprocessor trapsPeter Maydell
2016-02-11target-arm: Correct misleading 'is_thumb' syn_* parameter namesPeter Maydell
2016-02-11target-arm: Enable EL3 for Cortex-A53 and Cortex-A57Peter Maydell
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