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QEMU is a generic and open source machine & userspace emulator and virtualizer
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target-arm
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Author
2012-07-12
target-arm: Extend feature flags to 64 bits
Peter Maydell
2012-07-12
target-arm: Implement privileged-execute-never (PXN)
Peter Maydell
2012-07-12
ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bits
Peter Maydell
2012-07-12
target-arm: Fix TCG temp handling in 64 bit cp writes
Peter Maydell
2012-07-12
target-arm: Fix some copy-and-paste errors in cp register names
Peter Maydell
2012-07-12
target-arm: Fix typo that meant TTBR1 accesses went to TTBR0
Peter Maydell
2012-07-12
target-arm: Fix CP15 based WFI
Paul Brook
2012-06-20
target-arm: Remove ARM_CPUID_* macros
Peter Maydell
2012-06-20
target-arm: Remove remaining old cp15 infrastructure
Peter Maydell
2012-06-20
target-arm: Move block cache ops to new cp15 framework
Peter Maydell
2012-06-20
target-arm: Remove c0_cachetype CPUARMState field
Peter Maydell
2012-06-20
target-arm: Convert final ID registers
Peter Maydell
2012-06-20
target-arm: Convert MPIDR
Peter Maydell
2012-06-20
target-arm: Convert cp15 cache ID registers
Peter Maydell
2012-06-20
target-arm: Convert cp15 crn=0 crm={1,2} feature registers
Peter Maydell
2012-06-20
target-arm: Convert cp15 crn=1 registers
Peter Maydell
2012-06-20
target-arm: Convert cp15 crn=9 registers
Peter Maydell
2012-06-20
target-arm: Convert cp15 crn=6 registers
Peter Maydell
2012-06-20
target-arm: convert cp15 crn=7 registers
Peter Maydell
2012-06-20
target-arm: Convert cp15 VA-PA translation registers
Peter Maydell
2012-06-20
target-arm: Convert cp15 MMU TLB control
Peter Maydell
2012-06-20
target-arm: Convert cp15 crn=15 registers
Peter Maydell
2012-06-20
target-arm: Convert cp15 crn=10 registers
Peter Maydell
2012-06-20
target-arm: Convert cp15 crn=13 registers
Peter Maydell
2012-06-20
target-arm: Convert cp15 crn=2 registers
Peter Maydell
2012-06-20
target-arm: Convert MMU fault status cp15 registers
Peter Maydell
2012-06-20
target-arm: Convert cp15 c3 register
Peter Maydell
2012-06-20
target-arm: Convert generic timer cp15 regs
Peter Maydell
2012-06-20
target-arm: Convert performance monitor registers
Peter Maydell
2012-06-20
target-arm: Convert TLS registers
Peter Maydell
2012-06-20
target-arm: Convert WFI/barriers special cases to cp_reginfo
Peter Maydell
2012-06-20
target-arm: Convert TEECR, TEEHBR to new scheme
Peter Maydell
2012-06-20
target-arm: Convert debug registers to cp_reginfo
Peter Maydell
2012-06-20
target-arm: Add register_cp_regs_for_features()
Peter Maydell
2012-06-20
target-arm: Remove old cpu_arm_set_cp_io infrastructure
Peter Maydell
2012-06-20
target-arm: initial coprocessor register framework
Peter Maydell
2012-06-20
target-arm: Fix 11MPCore cache type register value
Peter Maydell
2012-06-07
build: move other target-*/ objects to nested Makefile.objs
Paolo Bonzini
2012-06-07
build: move libobj-y variable to nested Makefile.objs
Paolo Bonzini
2012-06-07
build: move obj-TARGET-y variables to nested Makefile.objs
Paolo Bonzini
2012-06-04
Kill off cpu_state_reset()
Andreas Färber
2012-06-04
target-arm: Use cpu_reset() in cpu_arm_init()
Andreas Färber
2012-05-10
target-arm/cpu.h: Make cpu_init("nonexistent cpu") return NULL
Peter Maydell
2012-05-10
target-arm: When setting FPSCR.QC, don't clear other FPSCR bits
Matt Craighead
2012-04-27
target-arm: Make SETEND respect bswap_code (BE8) setting
Peter Maydell
2012-04-27
target-arm: Move A9 config_base_address reset value to ARMCPU
Peter Maydell
2012-04-27
target-arm: Change cpu_arm_init() return type to ARMCPU
Andreas Färber
2012-04-21
target-arm: Move reset handling to arm_cpu_reset
Peter Maydell
2012-04-21
target-arm: Drop cpu_reset_model_id()
Peter Maydell
2012-04-21
target-arm: Move cache ID register setup to cpu specific init fns
Peter Maydell
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