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AgeCommit message (Expand)Author
2014-03-13cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber
2014-03-13exec: Change tlb_fill() argument to CPUStateAndreas Färber
2014-03-13cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber
2014-03-13cpu: Move opaque field from CPU_COMMON to CPUStateAndreas Färber
2014-03-13cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber
2014-03-13cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber
2014-03-13cpu: Factor out cpu_generic_init()Andreas Färber
2014-03-13cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber
2014-03-13target-arm: Clean up ENV_GET_CPU() usageAndreas Färber
2014-03-10target-arm: Implement WFE as a yield operationPeter Maydell
2014-03-10target-arm: Fix intptr_t vs tcg_target_longRichard Henderson
2014-03-10target-arm: Implements the ARM PMCCNTR registerAlistair Francis
2014-03-10target-arm: Fix incorrect setting of E bit in CPSRPeter Maydell
2014-02-26target-arm: Add support for AArch32 ARMv8 CRC32 instructionsWill Newton
2014-02-26target-arm: Add utility function for checking AA32/64 state of an ELPeter Maydell
2014-02-26target-arm: Implement AArch64 view of CPACRPeter Maydell
2014-02-26target-arm: A64: Implement MSR (immediate) instructionsPeter Maydell
2014-02-26target-arm: Store AIF bits in env->pstate for AArch32Peter Maydell
2014-02-26target-arm: A64: Implement WFIPeter Maydell
2014-02-26target-arm: Get MMU index information correct for A64 codePeter Maydell
2014-02-26target-arm: Implement AArch64 OSLAR_EL1 sysreg as WIPeter Maydell
2014-02-26target-arm: Implement AArch64 dummy breakpoint and watchpoint registersPeter Maydell
2014-02-26target-arm: Implement AArch64 ID and feature registersPeter Maydell
2014-02-26target-arm: Implement AArch64 generic timersPeter Maydell
2014-02-26target-arm: Implement AArch64 MPIDRPeter Maydell
2014-02-26target-arm: Implement AArch64 TTBR*Peter Maydell
2014-02-26target-arm: Implement AArch64 VBAR_EL1Peter Maydell
2014-02-26target-arm: Implement AArch64 TCR_EL1Peter Maydell
2014-02-26target-arm: Implement AArch64 SCTLR_EL1Peter Maydell
2014-02-26target-arm: Implement AArch64 memory attribute registersPeter Maydell
2014-02-26target-arm: Implement AArch64 dummy MDSCR_EL1Peter Maydell
2014-02-26target-arm: Implement AArch64 TLB invalidate opsPeter Maydell
2014-02-26target-arm: Implement AArch64 cache invalidate/clean opsPeter Maydell
2014-02-26target-arm: Implement AArch64 MIDR_EL1Peter Maydell
2014-02-26target-arm: Implement AArch64 CurrentEL sysregPeter Maydell
2014-02-26target-arm: A64: Make cache ID registers visible to AArch64Peter Maydell
2014-02-26target-arm: Fix raw read and write functions on AArch64 registersPeter Maydell
2014-02-26arm: vgic device control api supportChristoffer Dall
2014-02-26target-arm: Load correct access bits from ARMv5 level 2 page table descriptorsPeter Maydell
2014-02-26target-arm: Fix incorrect arithmetic constructing short-form PAR for ATS opsPeter Maydell
2014-02-20target-arm: A64: Implement unprivileged load/storePeter Maydell
2014-02-20target-arm: A64: Implement narrowing three-reg-diff operationsPeter Maydell
2014-02-20target-arm: A64: Implement the wide 3-reg-different operationsPeter Maydell
2014-02-20target-arm: A64: Add most remaining three-reg-diff widening opsPeter Maydell
2014-02-20target-arm: A64: Add opcode comments to disas_simd_three_reg_diffPeter Maydell
2014-02-20target-arm: A64: Implement store-exclusive for system modePeter Maydell
2014-02-20target-arm: Fix incorrect type for value argument to write_raw_cp_regPeter Maydell
2014-02-20target-arm: Remove failure status return from read/write_raw_cp_regPeter Maydell
2014-02-20target-arm: Remove unnecessary code now read/write fns can't failPeter Maydell
2014-02-20target-arm: Drop success/fail return from cpreg read and write functionsPeter Maydell
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