Age | Commit message (Expand) | Author |
2014-01-14 | Merge remote branch 'luiz/queue/qmp' into qmpq | Edgar E. Iglesias |
2014-01-14 | target-arm: Switch ARMCPUInfo arrays to use terminator entries | Peter Maydell |
2014-01-12 | arm: fix compile on bigendian host | Alexey Kardashevskiy |
2014-01-08 | target-arm: A64: Add support for FCVT between half, single and double | Peter Maydell |
2014-01-08 | target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructions | Peter Maydell |
2014-01-08 | target-arm: A64: Add floating-point<->integer conversion instructions | Will Newton |
2014-01-08 | target-arm: A64: Add floating-point<->fixed-point instructions | Alexander Graf |
2014-01-08 | target-arm: A64: Add extra VFP fixed point conversion helpers | Will Newton |
2014-01-08 | target-arm: Ignore most exceptions from scalbn when doing fixpoint conversion | Peter Maydell |
2014-01-08 | target-arm: Rename A32 VFP conversion helpers | Will Newton |
2014-01-08 | target-arm: Prepare VFP_CONV_FIX helpers for A64 uses | Will Newton |
2014-01-08 | target-arm: fix build with gcc 4.8.2 | Michael S. Tsirkin |
2014-01-08 | target-arm: remove raw_read|write duplication | Peter Crosthwaite |
2014-01-08 | target-arm: use c13_context field for CONTEXTIDR | Sergey Fedorov |
2014-01-08 | target-arm: Give the FPSCR rounding modes names | Alexander Graf |
2014-01-08 | target-arm: A64: Add support for floating point cond select | Claudio Fontana |
2014-01-08 | target-arm: A64: Add support for floating point conditional compare | Claudio Fontana |
2014-01-08 | target-arm: A64: Add support for floating point compare | Claudio Fontana |
2014-01-08 | target-arm: A64: Add fmov (scalar, immediate) instruction | Alexander Graf |
2014-01-08 | target-arm: A64: Add "Floating-point data-processing (3 source)" insns | Alexander Graf |
2014-01-08 | target-arm: A64: Add "Floating-point data-processing (2 source)" insns | Alexander Graf |
2014-01-08 | target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum | Peter Maydell |
2014-01-08 | target-arm: A64: Fix vector register access on bigendian hosts | Peter Maydell |
2014-01-08 | target-arm: A64: Add support for dumping AArch64 VFP register state | Alexander Graf |
2014-01-08 | target-arm: A64: support for ld/st/cl exclusive | Michael Matz |
2014-01-08 | target-arm: Widen exclusive-access support struct fields to 64 bits | Peter Maydell |
2014-01-08 | target-arm: aarch64: add support for ld lit | Alexander Graf |
2014-01-08 | target-arm: A64: add support for conditional compare insns | Claudio Fontana |
2014-01-08 | target-arm: A64: add support for add/sub with carry | Claudio Fontana |
2014-01-07 | target-arm: Widen thread-local register state fields to 64 bits | Peter Maydell |
2014-01-07 | target-arm: A64: Implement minimal set of EL0-visible sysregs | Peter Maydell |
2014-01-07 | target-arm: A64: Implement MRS/MSR/SYS/SYSL | Peter Maydell |
2014-01-07 | target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoder | Peter Maydell |
2014-01-06 | hw: Remove assert_no_error usages | Peter Crosthwaite |
2014-01-04 | target-arm: Update generic cpreg code for AArch64 | Peter Maydell |
2014-01-04 | target-arm: Pull "add one cpreg to hashtable" into its own function | Peter Maydell |
2013-12-23 | target-arm: A64: implement FMOV | Peter Maydell |
2013-12-23 | target-arm: A64: Add decoder skeleton for FP instructions | Peter Maydell |
2013-12-23 | target-arm: A64: implement SVC, BRK | Alexander Graf |
2013-12-23 | target-arm: A64: add support for 3 src data proc insns | Alexander Graf |
2013-12-23 | target-arm: A64: add support for move wide instructions | Alex Bennée |
2013-12-23 | target-arm: A64: add support for add, addi, sub, subi | Alex Bennée |
2013-12-23 | target-arm: A64: add support for ld/st with index | Alex Bennée |
2013-12-23 | target-arm: A64: add support for ld/st with reg offset | Alex Bennée |
2013-12-23 | target-arm: A64: add support for ld/st unsigned imm | Alex Bennée |
2013-12-23 | target-arm: A64: add support for ld/st pair | Peter Maydell |
2013-12-17 | target-arm: A64: add support for logical (immediate) insns | Alexander Graf |
2013-12-17 | target-arm: A64: add support for 1-src CLS insn | Claudio Fontana |
2013-12-17 | target-arm: A64: add support for bitfield insns | Claudio Fontana |
2013-12-17 | target-arm: A64: add support for 1-src REV insns | Claudio Fontana |