Age | Commit message (Expand) | Author |
2014-08-19 | arm: cortex-a9: Fix cache-line size and associativity | Peter Crosthwaite |
2014-08-19 | arm/virt: Use PSCI v0.2 function IDs in the DT when KVM uses PSCI v0.2 | Christoffer Dall |
2014-08-19 | target-arm: Rename QEMU PSCI v0.1 definitions | Christoffer Dall |
2014-08-19 | target-arm: Implement MDSCR_EL1 as having state | Peter Maydell |
2014-08-19 | target-arm: Implement ARMv8 single-stepping for AArch32 code | Peter Maydell |
2014-08-19 | target-arm: Implement ARMv8 single-step handling for A64 code | Peter Maydell |
2014-08-19 | target-arm: A64: Avoid duplicate exit_tb(0) in non-linked goto_tb | Peter Maydell |
2014-08-19 | target-arm: Set PSTATE.SS correctly on exception return from AArch64 | Peter Maydell |
2014-08-19 | target-arm: Correctly handle PSTATE.SS when taking exception to AArch32 | Peter Maydell |
2014-08-19 | target-arm: Don't allow AArch32 to access RES0 CPSR bits | Peter Maydell |
2014-08-19 | target-arm: Adjust debug ID registers per-CPU | Peter Maydell |
2014-08-19 | target-arm: Provide both 32 and 64 bit versions of debug registers | Peter Maydell |
2014-08-19 | target-arm: Allow STATE_BOTH reginfo descriptions for more than cp14 | Peter Maydell |
2014-08-19 | target-arm: Collect up the debug cp register definitions | Peter Maydell |
2014-08-19 | target-arm: Fix return address for A64 BRK instructions | Peter Maydell |
2014-08-12 | trace: [tcg] Include TCG-tracing header on all targets | Lluís Vilanova |
2014-08-04 | target-arm: A64: fix TLB flush instructions | Alex Bennée |
2014-08-04 | target-arm: don't hardcode mask values in arm_cpu_handle_mmu_fault | Alex Bennée |
2014-08-04 | target-arm: Fix bit test in sp_el0_access | Stefan Weil |
2014-08-04 | target-arm: Add FAR_EL2 and 3 | Edgar E. Iglesias |
2014-08-04 | target-arm: Add ESR_EL2 and 3 | Edgar E. Iglesias |
2014-08-04 | target-arm: Make far_el1 an array | Edgar E. Iglesias |
2014-08-04 | target-arm: A64: Respect SPSEL when taking exceptions | Edgar E. Iglesias |
2014-08-04 | target-arm: A64: Respect SPSEL in ERET SP restore | Edgar E. Iglesias |
2014-08-04 | target-arm: A64: Break out aarch64_save/restore_sp | Edgar E. Iglesias |
2014-07-08 | target-arm: Implement vCPU reset via KVM_ARM_VCPU_INIT for 32-bit CPUs | Peter Maydell |
2014-06-24 | Fix new typos (found by codespell) | Stefan Weil |
2014-06-19 | target-arm: Introduce per-CPU field for PSCI version | Pranavkumar Sawargaonkar |
2014-06-19 | target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64 | Pranavkumar Sawargaonkar |
2014-06-19 | target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possible | Pranavkumar Sawargaonkar |
2014-06-19 | target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64 | Pranavkumar Sawargaonkar |
2014-06-19 | target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv() | Peter Maydell |
2014-06-19 | target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int() | Peter Maydell |
2014-06-19 | target-arm: Add ULL suffix to calculation of page size | Peter Maydell |
2014-06-19 | target-arm: implement PD0/PD1 bits for TTBCR | Fabian Aggeler |
2014-06-16 | target-arm: Use Common Tables in AES Instructions | Tom Musta |
2014-06-09 | target-arm: Delete unused iwmmxt_msadb helper | Peter Maydell |
2014-06-09 | target-arm: Fix errors in writes to generic timer control registers | Peter Maydell |
2014-06-09 | target-arm: A64: Implement two-register SHA instructions | Peter Maydell |
2014-06-09 | target-arm: A64: Implement 3-register SHA instructions | Peter Maydell |
2014-06-09 | target-arm: A64: Implement AES instructions | Peter Maydell |
2014-06-09 | target-arm: A32/T32: Mask CRC value in calling code, not helper | Peter Maydell |
2014-06-09 | target-arm: A64: Implement CRC instructions | Peter Maydell |
2014-06-09 | target-arm: VFPv4 implies half-precision extension | Peter Maydell |
2014-06-09 | target-arm: Clean up handling of ARMv8 optional feature bits | Peter Maydell |
2014-06-09 | target-arm: Remove unnecessary setting of feature bits | Peter Maydell |
2014-06-09 | target-arm: arm_any_initfn() should never set ARM_FEATURE_AARCH64 | Peter Maydell |
2014-06-09 | target-arm: A64: Use PMULL feature bit for PMULL | Peter Maydell |
2014-06-09 | target-arm: add support for v8 VMULL.P64 instruction | Peter Maydell |
2014-06-09 | target-arm: Allow 3reg_wide undefreq to encode more bad size options | Peter Maydell |