Age | Commit message (Expand) | Author |
2016-03-22 | target-arm: dfilter support for in_asm | Alex Bennée |
2016-03-16 | target-arm: Implement MRS (banked) and MSR (banked) instructions | Peter Maydell |
2016-03-04 | target-arm: Only trap SRS from S-EL1 if specified mode is MON | Ralf-Philipp Weinmann |
2016-03-04 | target-arm: implement BE32 mode in system emulation | Paolo Bonzini |
2016-03-04 | target-arm: implement setend | Paolo Bonzini |
2016-03-04 | target-arm: introduce tbflag for endianness | Peter Crosthwaite |
2016-03-04 | target-arm: introduce disas flag for endianness | Paolo Bonzini |
2016-03-04 | target-arm: pass DisasContext to gen_aa32_ld*/st* | Paolo Bonzini |
2016-03-04 | target-arm: implement SCTLR.B, drop bswap_code | Paolo Bonzini |
2016-03-01 | tcg: Add type for vCPU pointers | Lluís Vilanova |
2016-02-26 | target-arm: Give CPSR setting on 32-bit exception return its own helper | Peter Maydell |
2016-02-18 | target-arm: UNDEF in the UNPREDICTABLE SRS-from-System case | Peter Maydell |
2016-02-18 | target-arm: Clean up trap/undef handling of SRS | Peter Maydell |
2016-02-11 | target-arm: Fix IL bit reported for Thumb VFP and Neon traps | Peter Maydell |
2016-02-11 | target-arm: Fix IL bit reported for Thumb coprocessor traps | Peter Maydell |
2016-02-11 | target-arm: Add isread parameter to CPAccessFns | Peter Maydell |
2016-02-09 | tcg: Change tcg_global_mem_new_* to take a TCGv_ptr | Richard Henderson |
2016-02-09 | tcg: Remove lingering references to gen_opc_buf | Richard Henderson |
2016-02-03 | log: do not unnecessarily include qom/cpu.h | Paolo Bonzini |
2016-01-18 | target-arm: Clean up includes | Peter Maydell |
2015-12-17 | target-arm: Fix and improve AA32 singlestep translation completion code | Sergey Fedorov |
2015-12-17 | target-arm: raise exception on misaligned LDREX operands | Andrew Baumann |
2015-11-19 | target-arm: Update condexec before arch BP check in AA32 translation | Sergey Fedorov |
2015-11-19 | target-arm: Update condexec before CP access check in AA32 translation | Sergey Fedorov |
2015-11-12 | target-arm: Update PC before calling gen_helper_check_breakpoints() | Sergey Fedorov |
2015-11-10 | target-arm: Clean up DISAS_UPDATE usage in AArch32 translation code | Sergey Fedorov |
2015-11-03 | target-arm: Report S/NS status in the CPU debug logs | Peter Maydell |
2015-10-28 | target-*: Advance pc after recognizing a breakpoint | Richard Henderson |
2015-10-27 | target-arm/translate.c: Handle non-executable page-straddling Thumb insns | Peter Maydell |
2015-10-16 | target-arm: Fix CPU breakpoint handling | Sergey Fedorov |
2015-10-16 | target-arm: Break the TB after ISB to execute self-modified code correctly | Sergey Sorokin |
2015-10-07 | tcg: Remove gen_intermediate_code_pc | Richard Henderson |
2015-10-07 | tcg: Pass data argument to restore_state_to_opc | Richard Henderson |
2015-10-07 | tcg: Add TCG_MAX_INSNS | Richard Henderson |
2015-10-07 | target-arm: Add condexec state to insn_start | Richard Henderson |
2015-10-07 | target-*: Introduce and use cpu_breakpoint_test | Richard Henderson |
2015-10-07 | target-*: Increment num_insns immediately after tcg_gen_insn_start | Richard Henderson |
2015-10-07 | target-*: Unconditionally emit tcg_gen_insn_start | Richard Henderson |
2015-10-07 | tcg: Rename debug_insn_start to insn_start | Richard Henderson |
2015-09-14 | target-arm: Handle always condition codes within arm_test_cc | Richard Henderson |
2015-09-14 | target-arm: Introduce DisasCompare | Richard Henderson |
2015-09-14 | target-arm: Share all common TCG temporaries | Richard Henderson |
2015-09-11 | maint: remove / fix many doubled words | Daniel P. Berrange |
2015-09-08 | target-arm: Fix default_exception_el() function for the case when EL3 is not ... | Sergey Sorokin |
2015-08-24 | tcg: Remove tcg_gen_trunc_i64_i32 | Richard Henderson |
2015-07-06 | target-arm: Implement YIELD insn to yield in ARM and Thumb translators | Peter Maydell |
2015-06-22 | disas: Remove uses of CPU env | Peter Crosthwaite |
2015-06-15 | target-arm: Correct "preferred return address" for cpreg access exceptions | Peter Maydell |
2015-06-15 | target-arm: Add the THUMB_DSP feature | Aurelio C. Remonda |
2015-05-29 | target-arm: Avoid buffer overrun on UNPREDICTABLE ldrd/strd | Peter Maydell |