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path: root/target-arm/translate.c
AgeCommit message (Expand)Author
2014-06-09target-arm: Delete unused iwmmxt_msadb helperPeter Maydell
2014-06-09target-arm: A32/T32: Mask CRC value in calling code, not helperPeter Maydell
2014-06-09target-arm: add support for v8 VMULL.P64 instructionPeter Maydell
2014-06-09target-arm: Allow 3reg_wide undefreq to encode more bad size optionsPeter Maydell
2014-06-09target-arm: add support for v8 SHA1 and SHA256 instructionsArd Biesheuvel
2014-06-05target-arm: move arm_*_code to a separate filePaolo Bonzini
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson
2014-05-27target-arm: Add SPSR entries for EL2/HYP and EL3/MONEdgar E. Iglesias
2014-05-27target-arm: A32: Use get_mem_index for load/storesEdgar E. Iglesias
2014-05-27target-arm/translate.c: Use get_mem_index() for SRS memory accessesPeter Maydell
2014-05-27target-arm/translate.c: Clean up mmu index handling for ldrt/strtPeter Maydell
2014-04-17arm: translate.c: Fix smlald InstructionPeter Crosthwaite
2014-04-17target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32Peter Maydell
2014-04-17target-arm: Implement ARMv8 MVFR registersPeter Maydell
2014-04-17target-arm: Fix VFP enables for AArch32 EL0 under AArch64 EL1Peter Maydell
2014-04-17target-arm: Add support for generating exceptions with syndrome informationPeter Maydell
2014-04-17target-arm: Provide correct syndrome information for cpreg access trapsPeter Maydell
2014-04-17target-arm: Split out private-to-target functions into internals.hPeter Maydell
2014-03-17target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)Alex Bennée
2014-03-17target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPEAlex Bennée
2014-03-17target-arm: A64: Implement PMULL instructionPeter Maydell
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber
2014-03-13cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber
2014-03-10target-arm: Implement WFE as a yield operationPeter Maydell
2014-02-26target-arm: Add support for AArch32 ARMv8 CRC32 instructionsWill Newton
2014-02-20target-arm: Remove unnecessary code now read/write fns can't failPeter Maydell
2014-02-20target-arm: Split cpreg access checks out from read/write functionsPeter Maydell
2014-02-20target-arm: Log bad system register accesses with LOG_UNIMPPeter Maydell
2014-02-08target-arm: Add support for AArch32 64bit VCVTB and VCVTTWill Newton
2014-01-31target-arm: Add AArch32 SIMD VCVTA, VCVTN, VCVTP and VCVTMWill Newton
2014-01-31target-arm: Add AArch32 FP VCVTA, VCVTN, VCVTP and VCVTMWill Newton
2014-01-31target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZWill Newton
2014-01-31target-arm: Add support for AArch32 SIMD VRINTXWill Newton
2014-01-31target-arm: Add support for AArch32 FP VRINTXWill Newton
2014-01-31target-arm: Add support for AArch32 FP VRINTZWill Newton
2014-01-31target-arm: Add support for AArch32 FP VRINTRWill Newton
2014-01-31target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTMWill Newton
2014-01-08target-arm: Rename A32 VFP conversion helpersWill Newton
2014-01-08target-arm: Use VFP_BINOP macro for min, max, minnum, maxnumPeter Maydell
2014-01-08target-arm: Widen exclusive-access support struct fields to 64 bitsPeter Maydell
2014-01-07target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoderPeter Maydell
2013-12-17target-arm: A64: add support for conditional branchesAlexander Graf
2013-12-17target-arm: Split A64 from A32/T32 gen_intermediate_code_internal()Peter Maydell
2013-12-17target-arm: add support for v8 AES instructionsArd Biesheuvel
2013-12-10target-arm: Use new qemu_ld/st opcodesRichard Henderson
2013-12-10target-arm: Implement ARMv8 SIMD VMAXNM and VMINNM instructions.Will Newton
2013-12-10target-arm: Implement ARMv8 FP VMAXNM and VMINNM instructions.Will Newton
2013-12-10target-arm: Implement ARMv8 VSEL instruction.Will Newton
2013-12-10target-arm: Move call to disas_vfp_insn out of disas_coproc_insn.Will Newton
2013-10-10tcg: Move helper registration into tcg_context_initRichard Henderson