Age | Commit message (Expand) | Author |
2015-06-22 | disas: Remove uses of CPU env | Peter Crosthwaite |
2015-06-15 | target-arm: Correct "preferred return address" for cpreg access exceptions | Peter Maydell |
2015-06-15 | target-arm: Add the THUMB_DSP feature | Aurelio C. Remonda |
2015-05-29 | target-arm: Avoid buffer overrun on UNPREDICTABLE ldrd/strd | Peter Maydell |
2015-05-29 | target-arm: Don't halt on WFI unless we don't have any work | Peter Maydell |
2015-05-29 | target-arm: Extend FP checks to use an EL | Greg Bellows |
2015-05-29 | target-arm: Add exception target el infrastructure | Greg Bellows |
2015-03-16 | target-arm: Fix handling of STM (user) with r15 in register list | Peter Maydell |
2015-03-13 | tcg: Change translator-side labels to a pointer | Richard Henderson |
2015-02-12 | tcg: Introduce tcg_op_buf_count and tcg_op_buf_full | Richard Henderson |
2015-02-12 | tcg: Move emit of INDEX_op_end into gen_tb_end | Richard Henderson |
2015-02-05 | target-arm: Use correct mmu_idx for unprivileged loads and stores | Peter Maydell |
2015-02-05 | target-arm: Define correct mmu_idx values and pass them in TB flags | Peter Maydell |
2015-02-05 | target-arm: check that LSB <= MSB in BFI instruction | Kirill Batuzov |
2015-01-03 | gen-icount: check cflags instead of use_icount global | Paolo Bonzini |
2015-01-03 | translate: check cflags instead of use_icount global | Paolo Bonzini |
2014-12-11 | target-arm: add secure state bit to CPREG hash | Peter Maydell |
2014-12-11 | target-arm: add non-secure Translation Block flag | Sergey Fedorov |
2014-11-04 | target-arm/translate.c: Don't pass CPUARMState * to disas_arm_insn() | Peter Maydell |
2014-11-04 | target-arm/translate.c: Don't pass CPUARMState around in the decoder | Peter Maydell |
2014-11-04 | target-arm/translate.c: Don't use IS_M() | Peter Maydell |
2014-11-04 | target-arm/translate.c: Use arm_dc_feature() rather than arm_feature() | Peter Maydell |
2014-11-04 | target-arm/translate.c: Use arm_dc_feature() in ENABLE_ARCH_ macros | Peter Maydell |
2014-10-24 | target-arm: rename arm_current_pl to arm_current_el | Greg Bellows |
2014-10-24 | target-arm: correctly UNDEF writes to FPINST/FPINST2 from EL0 | Peter Maydell |
2014-10-24 | target-arm: Add support for A32 and T32 HVC and SMC insns | Peter Maydell |
2014-09-29 | target-arm: Don't handle c15_cpar changes via tb_flush() | Peter Maydell |
2014-08-19 | target-arm: Implement ARMv8 single-stepping for AArch32 code | Peter Maydell |
2014-08-19 | target-arm: Don't allow AArch32 to access RES0 CPSR bits | Peter Maydell |
2014-08-12 | trace: [tcg] Include TCG-tracing header on all targets | Lluís Vilanova |
2014-06-09 | target-arm: Delete unused iwmmxt_msadb helper | Peter Maydell |
2014-06-09 | target-arm: A32/T32: Mask CRC value in calling code, not helper | Peter Maydell |
2014-06-09 | target-arm: add support for v8 VMULL.P64 instruction | Peter Maydell |
2014-06-09 | target-arm: Allow 3reg_wide undefreq to encode more bad size options | Peter Maydell |
2014-06-09 | target-arm: add support for v8 SHA1 and SHA256 instructions | Ard Biesheuvel |
2014-06-05 | target-arm: move arm_*_code to a separate file | Paolo Bonzini |
2014-05-28 | tcg: Invert the inclusion of helper.h | Richard Henderson |
2014-05-27 | target-arm: Add SPSR entries for EL2/HYP and EL3/MON | Edgar E. Iglesias |
2014-05-27 | target-arm: A32: Use get_mem_index for load/stores | Edgar E. Iglesias |
2014-05-27 | target-arm/translate.c: Use get_mem_index() for SRS memory accesses | Peter Maydell |
2014-05-27 | target-arm/translate.c: Clean up mmu index handling for ldrt/strt | Peter Maydell |
2014-04-17 | arm: translate.c: Fix smlald Instruction | Peter Crosthwaite |
2014-04-17 | target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32 | Peter Maydell |
2014-04-17 | target-arm: Implement ARMv8 MVFR registers | Peter Maydell |
2014-04-17 | target-arm: Fix VFP enables for AArch32 EL0 under AArch64 EL1 | Peter Maydell |
2014-04-17 | target-arm: Add support for generating exceptions with syndrome information | Peter Maydell |
2014-04-17 | target-arm: Provide correct syndrome information for cpreg access traps | Peter Maydell |
2014-04-17 | target-arm: Split out private-to-target functions into internals.h | Peter Maydell |
2014-03-17 | target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate) | Alex Bennée |
2014-03-17 | target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE | Alex Bennée |