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path: root/target-arm/translate.c
AgeCommit message (Expand)Author
2016-01-18target-arm: Clean up includesPeter Maydell
2015-12-17target-arm: Fix and improve AA32 singlestep translation completion codeSergey Fedorov
2015-12-17target-arm: raise exception on misaligned LDREX operandsAndrew Baumann
2015-11-19target-arm: Update condexec before arch BP check in AA32 translationSergey Fedorov
2015-11-19target-arm: Update condexec before CP access check in AA32 translationSergey Fedorov
2015-11-12target-arm: Update PC before calling gen_helper_check_breakpoints()Sergey Fedorov
2015-11-10target-arm: Clean up DISAS_UPDATE usage in AArch32 translation codeSergey Fedorov
2015-11-03target-arm: Report S/NS status in the CPU debug logsPeter Maydell
2015-10-28target-*: Advance pc after recognizing a breakpointRichard Henderson
2015-10-27target-arm/translate.c: Handle non-executable page-straddling Thumb insnsPeter Maydell
2015-10-16target-arm: Fix CPU breakpoint handlingSergey Fedorov
2015-10-16target-arm: Break the TB after ISB to execute self-modified code correctlySergey Sorokin
2015-10-07tcg: Remove gen_intermediate_code_pcRichard Henderson
2015-10-07tcg: Pass data argument to restore_state_to_opcRichard Henderson
2015-10-07tcg: Add TCG_MAX_INSNSRichard Henderson
2015-10-07target-arm: Add condexec state to insn_startRichard Henderson
2015-10-07target-*: Introduce and use cpu_breakpoint_testRichard Henderson
2015-10-07target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson
2015-10-07target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson
2015-10-07tcg: Rename debug_insn_start to insn_startRichard Henderson
2015-09-14target-arm: Handle always condition codes within arm_test_ccRichard Henderson
2015-09-14target-arm: Introduce DisasCompareRichard Henderson
2015-09-14target-arm: Share all common TCG temporariesRichard Henderson
2015-09-11maint: remove / fix many doubled wordsDaniel P. Berrange
2015-09-08target-arm: Fix default_exception_el() function for the case when EL3 is not ...Sergey Sorokin
2015-08-24tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson
2015-07-06target-arm: Implement YIELD insn to yield in ARM and Thumb translatorsPeter Maydell
2015-06-22disas: Remove uses of CPU envPeter Crosthwaite
2015-06-15target-arm: Correct "preferred return address" for cpreg access exceptionsPeter Maydell
2015-06-15target-arm: Add the THUMB_DSP featureAurelio C. Remonda
2015-05-29target-arm: Avoid buffer overrun on UNPREDICTABLE ldrd/strdPeter Maydell
2015-05-29target-arm: Don't halt on WFI unless we don't have any workPeter Maydell
2015-05-29target-arm: Extend FP checks to use an ELGreg Bellows
2015-05-29target-arm: Add exception target el infrastructureGreg Bellows
2015-03-16target-arm: Fix handling of STM (user) with r15 in register listPeter Maydell
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson
2015-02-12tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson
2015-02-12tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson
2015-02-05target-arm: Use correct mmu_idx for unprivileged loads and storesPeter Maydell
2015-02-05target-arm: Define correct mmu_idx values and pass them in TB flagsPeter Maydell
2015-02-05target-arm: check that LSB <= MSB in BFI instructionKirill Batuzov
2015-01-03gen-icount: check cflags instead of use_icount globalPaolo Bonzini
2015-01-03translate: check cflags instead of use_icount globalPaolo Bonzini
2014-12-11target-arm: add secure state bit to CPREG hashPeter Maydell
2014-12-11target-arm: add non-secure Translation Block flagSergey Fedorov
2014-11-04target-arm/translate.c: Don't pass CPUARMState * to disas_arm_insn()Peter Maydell
2014-11-04target-arm/translate.c: Don't pass CPUARMState around in the decoderPeter Maydell
2014-11-04target-arm/translate.c: Don't use IS_M()Peter Maydell
2014-11-04target-arm/translate.c: Use arm_dc_feature() rather than arm_feature()Peter Maydell
2014-11-04target-arm/translate.c: Use arm_dc_feature() in ENABLE_ARCH_ macrosPeter Maydell