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path: root/target-arm/translate-a64.c
AgeCommit message (Expand)Author
2013-12-17target-arm: A64: add support for logical (immediate) insnsAlexander Graf
2013-12-17target-arm: A64: add support for 1-src CLS insnClaudio Fontana
2013-12-17target-arm: A64: add support for bitfield insnsClaudio Fontana
2013-12-17target-arm: A64: add support for 1-src REV insnsClaudio Fontana
2013-12-17target-arm: A64: add support for 1-src RBIT insnAlexander Graf
2013-12-17target-arm: A64: add support for 1-src data processing and CLZClaudio Fontana
2013-12-17target-arm: A64: add support for 2-src shift reg insnsAlexander Graf
2013-12-17target-arm: A64: add support for 2-src data processing and DIVAlexander Graf
2013-12-17target-arm: A64: add support for EXTRAlexander Graf
2013-12-17target-arm: A64: add support for ADR and ADRPAlexander Graf
2013-12-17target-arm: A64: add support for logical (shifted register)Alexander Graf
2013-12-17target-arm: A64: add support for conditional selectClaudio Fontana
2013-12-17target-arm: A64: add support for compare and branch immAlexander Graf
2013-12-17target-arm: A64: add support for 'test and branch' immAlexander Graf
2013-12-17target-arm: A64: add support for conditional branchesAlexander Graf
2013-12-17target-arm: A64: add support for BR, BLR and RET insnsAlexander Graf
2013-12-17target-arm: A64: add support for B and BL insnsAlexander Graf
2013-12-17target-arm: A64: expand decoding skeleton for system instructionsClaudio Fontana
2013-12-17target-arm: A64: provide skeleton for a64 insn decodingClaudio Fontana
2013-12-17target-arm: Split A64 from A32/T32 gen_intermediate_code_internal()Peter Maydell
2013-12-17target-arm: Clean up handling of AArch64 PSTATEPeter Maydell
2013-09-10target-arm: Add AArch64 translation stubAlexander Graf
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