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path: root/target-arm/translate-a64.c
AgeCommit message (Expand)Author
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson
2015-02-13Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20150212' into stagingPeter Maydell
2015-02-13target-arm: A64: Avoid signed shifts in disas_ldst_pair()Peter Maydell
2015-02-13target-arm: A64: Avoid left shifting negative integers in disas_pc_rel_addrPeter Maydell
2015-02-13target-arm: A64: Fix handling of rotate in logic_imm_decode_wmaskPeter Maydell
2015-02-13target-arm: A64: Fix shifts into sign bitPeter Maydell
2015-02-12tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson
2015-02-12tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson
2015-02-05target-arm: Use correct mmu_idx for unprivileged loads and storesPeter Maydell
2015-02-05target-arm: Define correct mmu_idx values and pass them in TB flagsPeter Maydell
2015-02-05target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STTPeter Maydell
2015-01-03gen-icount: check cflags instead of use_icount globalPaolo Bonzini
2015-01-03translate: check cflags instead of use_icount globalPaolo Bonzini
2014-11-02target-arm: A64: remove redundant storeAlex Bennée
2014-10-24target-arm: rename arm_current_pl to arm_current_elGreg Bellows
2014-10-24target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpersPeter Maydell
2014-09-29target-arm: A64: Emulate the SMC insnEdgar E. Iglesias
2014-09-29target-arm: A64: Emulate the HVC insnEdgar E. Iglesias
2014-08-19target-arm: Implement ARMv8 single-step handling for A64 codePeter Maydell
2014-08-19target-arm: A64: Avoid duplicate exit_tb(0) in non-linked goto_tbPeter Maydell
2014-08-19target-arm: Fix return address for A64 BRK instructionsPeter Maydell
2014-08-12trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova
2014-06-19target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv()Peter Maydell
2014-06-19target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int()Peter Maydell
2014-06-09target-arm: A64: Implement two-register SHA instructionsPeter Maydell
2014-06-09target-arm: A64: Implement 3-register SHA instructionsPeter Maydell
2014-06-09target-arm: A64: Implement AES instructionsPeter Maydell
2014-06-09target-arm: A64: Implement CRC instructionsPeter Maydell
2014-06-09target-arm: A64: Use PMULL feature bit for PMULLPeter Maydell
2014-06-05target-arm: move arm_*_code to a separate filePaolo Bonzini
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson
2014-05-27target-arm: A64: Trap ERET from EL0 at translation timeEdgar E. Iglesias
2014-05-27target-arm: Move get_mem_index to translate.hEdgar E. Iglesias
2014-05-01target-arm: A64: Handle blr lrEdgar E. Iglesias
2014-05-01target-arm: implement WFE/YIELD as a yield for AArch64Rob Herring
2014-04-17target-arm: A64: fix unallocated test of scalar SQXTUNAlex Bennée
2014-04-17target-arm: Implement AArch64 EL1 exception handlingRob Herring
2014-04-17target-arm: A64: Implement DC ZVAPeter Maydell
2014-04-17target-arm: A64: Add assertion that FP access was checkedPeter Maydell
2014-04-17target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN setPeter Maydell
2014-04-17target-arm: Add support for generating exceptions with syndrome informationPeter Maydell
2014-04-17target-arm: Provide correct syndrome information for cpreg access trapsPeter Maydell
2014-04-17target-arm: Split out private-to-target functions into internals.hPeter Maydell
2014-03-24target-arm: Fix A64 Neon MLSPeter Maydell
2014-03-18target-arm: A64: Add saturating accumulate ops (USQADD/SUQADD)Alex Bennée
2014-03-18target-arm: A64: Add saturating int ops (SQNEG/SQABS)Alex Bennée
2014-03-17target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)Alex Bennée
2014-03-17target-arm: A64: Implement FCVTXNPeter Maydell
2014-03-17target-arm: A64: Implement scalar saturating narrow opsAlex Bennée
2014-03-17target-arm: A64: Move handle_2misc_narrow functionAlex Bennée
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