Age | Commit message (Expand) | Author |
2015-10-27 | target-arm: Add support for S1 + S2 MMU translations | Edgar E. Iglesias |
2015-10-27 | target-arm: Route S2 MMU faults to EL2 | Edgar E. Iglesias |
2015-10-27 | target-arm: Add S2 translation to 64bit S1 PTWs | Edgar E. Iglesias |
2015-10-27 | target-arm: Add ARMMMUFaultInfo | Edgar E. Iglesias |
2015-10-16 | target-arm: Fix CPU breakpoint handling | Sergey Fedorov |
2015-10-16 | target-arm: Fix GDB breakpoint handling | Sergey Fedorov |
2015-08-25 | target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3 | Peter Maydell |
2015-07-06 | target-arm: Split DISAS_YIELD from DISAS_WFE | Peter Maydell |
2015-06-15 | arm: Refactor get_phys_addr FSR return mechanism | Peter Crosthwaite |
2015-06-02 | target-arm: Correct check for non-EL3 | Edgar E. Iglesias |
2015-05-29 | target-arm: Add WFx instruction trap support | Greg Bellows |
2015-05-29 | target-arm: Don't halt on WFI unless we don't have any work | Peter Maydell |
2015-05-29 | target-arm: Allow cp access functions to indicate traps to EL2 or EL3 | Peter Maydell |
2015-05-29 | target-arm: Make raise_exception() take syndrome and target EL | Peter Maydell |
2015-05-29 | target-arm: Set exception target EL in tlb_fill | Peter Maydell |
2015-05-29 | target-arm: Move setting of exception info into tlb_fill | Peter Maydell |
2015-05-29 | target-arm: Set correct syndrome for faults on MSR DAIF*, imm | Peter Maydell |
2015-05-29 | target-arm: Extend helpers to route exceptions | Greg Bellows |
2015-05-29 | target-arm: Add exception target el infrastructure | Greg Bellows |
2015-04-26 | target-arm: Check watchpoints against CPU security state | Peter Maydell |
2015-04-26 | target-arm: Use attribute info to handle user-only watchpoints | Peter Maydell |
2015-02-13 | target-arm: Add 32/64-bit register sync | Greg Bellows |
2014-12-11 | target-arm: make c13 cp regs banked (FCSEIDR, ...) | Fabian Aggeler |
2014-12-11 | target-arm: add SCTLR_EL3 and make SCTLR banked | Fabian Aggeler |
2014-10-24 | target-arm: A32: Emulate the SMC instruction | Fabian Aggeler |
2014-10-24 | target-arm: rename arm_current_pl to arm_current_el | Greg Bellows |
2014-10-24 | target-arm: add emulation of PSCI calls for system emulation | Rob Herring |
2014-10-24 | target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpers | Peter Maydell |
2014-09-29 | target-arm: A64: Emulate the SMC insn | Edgar E. Iglesias |
2014-09-29 | target-arm: A64: Emulate the HVC insn | Edgar E. Iglesias |
2014-09-29 | target-arm: Don't handle c15_cpar changes via tb_flush() | Peter Maydell |
2014-09-29 | target-arm: Implement handling of breakpoint firing | Peter Maydell |
2014-09-12 | target-arm: Implement handling of fired watchpoints | Peter Maydell |
2014-08-19 | target-arm: Implement ARMv8 single-step handling for A64 code | Peter Maydell |
2014-08-19 | target-arm: Set PSTATE.SS correctly on exception return from AArch64 | Peter Maydell |
2014-08-19 | target-arm: Don't allow AArch32 to access RES0 CPSR bits | Peter Maydell |
2014-08-04 | target-arm: A64: Respect SPSEL in ERET SP restore | Edgar E. Iglesias |
2014-08-04 | target-arm: A64: Break out aarch64_save/restore_sp | Edgar E. Iglesias |
2014-06-05 | softmmu: introduce cpu_ldst.h | Paolo Bonzini |
2014-06-05 | softmmu: commonize helper definitions | Paolo Bonzini |
2014-05-28 | tcg: Invert the inclusion of helper.h | Richard Henderson |
2014-05-27 | target-arm: A64: Generalize ERET to various ELs | Edgar E. Iglesias |
2014-05-27 | target-arm: A64: Forbid ERET to higher or unimplemented ELs | Edgar E. Iglesias |
2014-05-27 | target-arm: A64: Introduce aarch64_banked_spsr_index() | Edgar E. Iglesias |
2014-05-27 | target-arm: Make elr_el1 an array | Edgar E. Iglesias |
2014-05-01 | target-arm: Correct a comment refering to EL0 | Edgar E. Iglesias |
2014-04-17 | target-arm: Implement AArch64 EL1 exception handling | Rob Herring |
2014-04-17 | target-arm: Implement SP_EL0, SP_EL1 | Peter Maydell |
2014-04-17 | target-arm: Add support for generating exceptions with syndrome information | Peter Maydell |
2014-04-17 | target-arm: Provide correct syndrome information for cpreg access traps | Peter Maydell |