Age | Commit message (Expand) | Author |
2016-09-06 | target-arm: Fix lpae bit in FSR on an alignment fault | Sergey Sorokin |
2016-07-12 | Fix confusing argument names in some common functions | Sergey Sorokin |
2016-06-17 | target-arm: Provide hook to tell GICv3 about changes of security state | Peter Maydell |
2016-06-06 | target-arm: A64: Create Instruction Syndromes for Data Aborts | Edgar E. Iglesias |
2016-05-19 | cpu: move exec-all.h inclusion out of cpu.h | Paolo Bonzini |
2016-05-12 | target-arm: Split data abort syndrome generator | Peter Maydell |
2016-03-16 | target-arm: Implement MRS (banked) and MSR (banked) instructions | Peter Maydell |
2016-03-04 | target-arm: implement setend | Paolo Bonzini |
2016-02-26 | target-arm: Raw CPSR writes should skip checks and bank switching | Peter Maydell |
2016-02-26 | target-arm: Add write_type argument to cpsr_write() | Peter Maydell |
2016-02-26 | target-arm: Give CPSR setting on 32-bit exception return its own helper | Peter Maydell |
2016-02-18 | target-arm: UNDEF in the UNPREDICTABLE SRS-from-System case | Peter Maydell |
2016-02-18 | target-arm: Combine user-only and softmmu get/set_r13_banked() | Peter Maydell |
2016-02-18 | target-arm: Move get/set_r13_banked() to op_helper.c | Peter Maydell |
2016-02-18 | target-arm: Report correct syndrome for FPEXC32_EL2 traps | Peter Maydell |
2016-02-18 | target-arm: Fix handling of SCR.SMD | Peter Maydell |
2016-02-11 | target-arm: Implement checking of fired watchpoint | Sergey Fedorov |
2016-02-11 | target-arm: Add isread parameter to CPAccessFns | Peter Maydell |
2016-01-21 | target-arm: ignore ELR_ELx[1] for exception return to 32-bit ARM mode | Peter Maydell |
2016-01-21 | target-arm: Implement remaining illegal return event checks | Peter Maydell |
2016-01-21 | target-arm: Handle exception return from AArch64 to non-EL0 AArch32 | Peter Maydell |
2016-01-18 | target-arm: Clean up includes | Peter Maydell |
2016-01-15 | target-arm: Use the right MMU index in arm_regime_using_lpae_format | Alvise Rigo |
2015-12-17 | target-arm: raise exception on misaligned LDREX operands | Andrew Baumann |
2015-11-10 | target-arm: Fix gdb singlestep handling in arm_debug_excp_handler() | Sergey Fedorov |
2015-11-03 | target-arm: Add and use symbolic names for register banks | Soren Brinkmann |
2015-10-27 | target-arm: Add support for S1 + S2 MMU translations | Edgar E. Iglesias |
2015-10-27 | target-arm: Route S2 MMU faults to EL2 | Edgar E. Iglesias |
2015-10-27 | target-arm: Add S2 translation to 64bit S1 PTWs | Edgar E. Iglesias |
2015-10-27 | target-arm: Add ARMMMUFaultInfo | Edgar E. Iglesias |
2015-10-16 | target-arm: Fix CPU breakpoint handling | Sergey Fedorov |
2015-10-16 | target-arm: Fix GDB breakpoint handling | Sergey Fedorov |
2015-08-25 | target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3 | Peter Maydell |
2015-07-06 | target-arm: Split DISAS_YIELD from DISAS_WFE | Peter Maydell |
2015-06-15 | arm: Refactor get_phys_addr FSR return mechanism | Peter Crosthwaite |
2015-06-02 | target-arm: Correct check for non-EL3 | Edgar E. Iglesias |
2015-05-29 | target-arm: Add WFx instruction trap support | Greg Bellows |
2015-05-29 | target-arm: Don't halt on WFI unless we don't have any work | Peter Maydell |
2015-05-29 | target-arm: Allow cp access functions to indicate traps to EL2 or EL3 | Peter Maydell |
2015-05-29 | target-arm: Make raise_exception() take syndrome and target EL | Peter Maydell |
2015-05-29 | target-arm: Set exception target EL in tlb_fill | Peter Maydell |
2015-05-29 | target-arm: Move setting of exception info into tlb_fill | Peter Maydell |
2015-05-29 | target-arm: Set correct syndrome for faults on MSR DAIF*, imm | Peter Maydell |
2015-05-29 | target-arm: Extend helpers to route exceptions | Greg Bellows |
2015-05-29 | target-arm: Add exception target el infrastructure | Greg Bellows |
2015-04-26 | target-arm: Check watchpoints against CPU security state | Peter Maydell |
2015-04-26 | target-arm: Use attribute info to handle user-only watchpoints | Peter Maydell |
2015-02-13 | target-arm: Add 32/64-bit register sync | Greg Bellows |
2014-12-11 | target-arm: make c13 cp regs banked (FCSEIDR, ...) | Fabian Aggeler |
2014-12-11 | target-arm: add SCTLR_EL3 and make SCTLR banked | Fabian Aggeler |