Age | Commit message (Expand) | Author |
2016-06-17 | target-arm: Provide hook to tell GICv3 about changes of security state | Peter Maydell |
2016-06-06 | target-arm: Set IL bit in syndromes for insn abort, watchpoint, swstep | Peter Maydell |
2016-05-19 | arm: move arm_log_exception into .c file | Paolo Bonzini |
2016-05-12 | target-arm: Split data abort syndrome generator | Peter Maydell |
2016-02-18 | target-arm: Move bank_number() into internals.h | Peter Maydell |
2016-02-11 | target-arm: Implement checking of fired watchpoint | Sergey Fedorov |
2016-02-11 | target-arm: Correct misleading 'is_thumb' syn_* parameter names | Peter Maydell |
2016-01-15 | target-arm: Use the right MMU index in arm_regime_using_lpae_format | Alvise Rigo |
2015-12-17 | target-arm: raise exception on misaligned LDREX operands | Andrew Baumann |
2015-11-03 | target-arm: Add and use symbolic names for register banks | Soren Brinkmann |
2015-10-27 | target-arm: Add ARMMMUFaultInfo | Edgar E. Iglesias |
2015-10-27 | target-arm: Add computation of starting level for S2 PTW | Edgar E. Iglesias |
2015-09-07 | target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction | Peter Maydell |
2015-06-15 | arm: Refactor get_phys_addr FSR return mechanism | Peter Crosthwaite |
2015-05-29 | target-arm: Move setting of exception info into tlb_fill | Peter Maydell |
2015-05-18 | target-arm: Add WFx syndrome function | Greg Bellows |
2015-04-01 | target-arm: Store SPSR_EL1 state in banked_spsr[1] (SPSR_svc) | Peter Maydell |
2014-12-11 | target-arm: make TTBCR banked | Fabian Aggeler |
2014-10-24 | target-arm: rename arm_current_pl to arm_current_el | Greg Bellows |
2014-10-24 | target-arm: add emulation of PSCI calls for system emulation | Rob Herring |
2014-10-24 | target-arm: Add support for A32 and T32 HVC and SMC insns | Peter Maydell |
2014-09-29 | target-arm: Add support for VIRQ and VFIQ | Edgar E. Iglesias |
2014-09-29 | target-arm: A64: Emulate the SMC insn | Edgar E. Iglesias |
2014-09-29 | target-arm: Add a Hypervisor Trap exception type | Edgar E. Iglesias |
2014-09-29 | target-arm: A64: Emulate the HVC insn | Edgar E. Iglesias |
2014-09-29 | target-arm: Implement handling of breakpoint firing | Peter Maydell |
2014-09-29 | target-arm: Implement setting guest breakpoints | Peter Maydell |
2014-09-12 | target-arm: Implement handling of fired watchpoints | Peter Maydell |
2014-09-12 | target-arm: Move extended_addresses_enabled() to internals.h | Peter Maydell |
2014-09-12 | target-arm: Implement setting of watchpoints | Peter Maydell |
2014-08-19 | target-arm: Implement ARMv8 single-step handling for A64 code | Peter Maydell |
2014-08-04 | target-arm: A64: Break out aarch64_save/restore_sp | Edgar E. Iglesias |
2014-05-27 | target-arm: A64: Generalize update_spsel for the various ELs | Edgar E. Iglesias |
2014-05-27 | target-arm: A64: Introduce aarch64_banked_spsr_index() | Edgar E. Iglesias |
2014-04-17 | target-arm: Move arm_log_exception() into internals.h | Peter Maydell |
2014-04-17 | target-arm: Implement SP_EL0, SP_EL1 | Peter Maydell |
2014-04-17 | target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN set | Peter Maydell |
2014-04-17 | target-arm: Provide syndrome information for MMU faults | Rob Herring |
2014-04-17 | target-arm: Add support for generating exceptions with syndrome information | Peter Maydell |
2014-04-17 | target-arm: Provide correct syndrome information for cpreg access traps | Peter Maydell |
2014-04-17 | target-arm: Split out private-to-target functions into internals.h | Peter Maydell |