| Age | Commit message (Expand) | Author |
|---|
| 2015-07-06 | target-arm: fix write helper for TLBI ALLE1IS | Sergey Fedorov |
| 2015-06-19 | semihosting: create SemihostingConfig structure and semihost.h | Leon Alrae |
| 2015-06-19 | target-arm: Implement PMSAv7 MPU | Peter Crosthwaite |
| 2015-06-19 | target-arm: Add registers for PMSAv7 | Peter Crosthwaite |
| 2015-06-19 | target-arm/helper.c: define MPUIR register | Peter Crosthwaite |
| 2015-06-19 | target-arm: Do not reset sysregs marked as ALIAS | Sergey Fedorov |
| 2015-06-15 | arm: helper: rename get_phys_addr_mpu | Peter Crosthwaite |
| 2015-06-15 | arm: Implement uniprocessor with MP config | Peter Crosthwaite |
| 2015-06-15 | arm: Refactor get_phys_addr FSR return mechanism | Peter Crosthwaite |
| 2015-06-15 | arm: helper: Factor out CP regs common to [pv]msa | Peter Crosthwaite |
| 2015-06-15 | arm: Don't add v7mp registers in MPU systems | Peter Crosthwaite |
| 2015-06-15 | arm: Do not define TLBTR in PMSA systems | Peter Crosthwaite |
| 2015-06-15 | target-arm: Use the kernel's idea of MPIDR if we're using KVM | Pavel Fedin |
| 2015-06-15 | target-arm: add AArch32 MIDR aliases in ARMv8 | Sergey Fedorov |
| 2015-06-15 | target-arm: Fix REVIDR reset value | Sergey Fedorov |
| 2015-06-15 | target-arm: use extended address bits from supersection short descriptor | Sergey Fedorov |
| 2015-06-15 | target-arm: Handle "extended small page" descriptors correctly | Peter Maydell |
| 2015-06-02 | target-arm: Remove v8_ prefix from names of non-v8-specific cpreg arrays | Peter Maydell |
| 2015-06-02 | Revert "target-arm: Avoid g_hash_table_get_keys()" | Markus Armbruster |
| 2015-06-02 | target-arm: Add TLBI_VAE2{IS} | Edgar E. Iglesias |
| 2015-06-02 | target-arm: Add TLBI_ALLE2 | Edgar E. Iglesias |
| 2015-06-02 | target-arm: Add TLBI_ALLE1{IS} | Edgar E. Iglesias |
| 2015-06-02 | target-arm: Add TTBR0_EL2 | Edgar E. Iglesias |
| 2015-06-02 | target-arm: Add TPIDR_EL2 | Edgar E. Iglesias |
| 2015-06-02 | target-arm: Add SCTLR_EL2 | Edgar E. Iglesias |
| 2015-06-02 | target-arm: Add TCR_EL2 | Edgar E. Iglesias |
| 2015-06-02 | target-arm: Add MAIR_EL2 | Edgar E. Iglesias |
| 2015-06-02 | target-arm: Break down TLB_LOCKDOWN | Edgar E. Iglesias |
| 2015-05-29 | target-arm: Add AArch64 CPTR registers | Greg Bellows |
| 2015-05-29 | target-arm: Update interrupt handling to use target EL | Greg Bellows |
| 2015-05-29 | target-arm: Move setting of exception info into tlb_fill | Peter Maydell |
| 2015-05-18 | target-arm: Remove unneeded '+' | Edgar E. Iglesias |
| 2015-05-18 | target-arm: Correct accessfn for CNTV_TVAL_EL0 | Edgar E. Iglesias |
| 2015-05-18 | target-arm: Correct accessfn for CNTP_{CT}VAL_EL0 | Edgar E. Iglesias |
| 2015-05-18 | target-arm: Add EL3 and EL2 TCR checking | Greg Bellows |
| 2015-05-18 | target-arm: Add TTBR regime function and use | Greg Bellows |
| 2015-05-14 | tcg: Push merged memop+mmu_idx parameter to softmmu routines | Richard Henderson |
| 2015-04-26 | Allow ARMv8 SCR.SMD updates | Greg Bellows |
| 2015-04-26 | target-arm: rename c1_coproc to cpacr_el1 | Sergey Fedorov |
| 2015-04-26 | target-arm: Add user-mode transaction attribute | Peter Maydell |
| 2015-04-26 | target-arm: Use correct memory attributes for page table walks | Peter Maydell |
| 2015-04-26 | target-arm: Honour NS bits in page tables | Peter Maydell |
| 2015-04-01 | target-arm: Store SPSR_EL1 state in banked_spsr[1] (SPSR_svc) | Peter Maydell |
| 2015-03-16 | target-arm: Ignore low bit of PC in M-profile exception return | Peter Maydell |
| 2015-03-16 | target-arm: get_phys_addr_lpae: more xn control | Andrew Jones |
| 2015-03-16 | target-arm: fix get_phys_addr_v6/SCTLR_AFE access check | Andrew Jones |
| 2015-03-16 | target-arm: convert check_ap to ap_to_rw_prot | Andrew Jones |
| 2015-02-13 | target-arm: Add 32/64-bit register sync | Greg Bellows |
| 2015-02-05 | target-arm: fix for exponent comparison in recpe_f64 | Ildar Isaev |
| 2015-02-05 | target-arm: Fix brace style in reindented code | Peter Maydell |
